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Power device and preparation method therefor

A technology for power devices and substrates, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of increasing the conduction loss of power devices and affecting the reliability of power devices, reducing parasitic capacitance and improving switching. Speed ​​and pressure resistance, stress reduction effect

Inactive Publication Date: 2019-01-01
SHENGSHIYAOLAN SHENZHEN TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Since a large part of the conduction loss is caused by the gate leakage of the power device, the gate of the power device needs to withstand a certain operating voltage in the working state, and the gate leakage will increase the conduction of the power device. In addition to loss, it will also affect the reliability of power devices

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  • Power device and preparation method therefor
  • Power device and preparation method therefor
  • Power device and preparation method therefor

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Embodiment Construction

[0021] In order to understand the specific technical solutions, features and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0022] In the description of the present invention, it should be noted that the terms "upper", "lower", "left", "right", "transverse", "longitudinal", "horizontal", "inner", "outer" etc. indicate The orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship that is usually placed when the product of the invention is used, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying the It should not be construed as limiting the invention that a device or element must have a particular orientation, be constructed, and operate in a particular ...

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Abstract

The invention provides a power device, and the power device includes a substrate, an epitaxial layer formed on the substrate, body regions formed in the epitaxial layer, source regions formed in the body regions, channel regions between the body regions and the source regions, a drift region between the body regions, first silicon oxide layers formed on the epitaxial layer, a silicon oxynitride layer formed between the first silicon oxide layers, semi-insulating polysilicon layers which are formed on the upper surfaces of the first silicon oxide layers and the silicon oxynitride layer, secondsilicon oxide layers formed on the semi-insulating polysilicon layers, and polysilicon layers formed on the upper surfaces of the second silicon oxide layers. The first silicon oxide layers are located on the upper surfaces of the channel regions and the source regions, and a projection region of the silicon oxynitride layer in a direction perpendicular to the upper surface of the substrate is included in the projection region of the drift region. The invention also provides a method for preparing the power device, which reduces conduction loss and parasitic capacitance, and improves the switching speed.

Description

technical field [0001] The invention relates to the technical field of semiconductor chip manufacturing technology, in particular to a power device and a preparation method thereof. Background technique [0002] The drain and source poles of the vertical double diffused field effect transistor (VDMOS) are respectively on both sides of the device, so that the current flows vertically inside the device, increasing the current density, improving the rated current, and the on-resistance per unit area is also small, which is a A very versatile power device. The most important performance parameter of the vertical double-diffused field effect transistor is the operating loss, which can be divided into three parts: conduction loss, cut-off loss and switching loss. The conduction loss is determined by the conduction resistance, the cut-off loss is affected by the reverse leakage current, and the switching loss refers to the loss caused by the charging and discharging of parasitic c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L21/336
CPCH01L29/0611H01L29/42364H01L29/66712H01L29/7802
Inventor 不公告发明人
Owner SHENGSHIYAOLAN SHENZHEN TECH CO LTD