Flash memory system and method for image convolution operation assisted by adder

Abstract

An adder-aided flash memory system and method for implementing image convolution operation are disclosed, wherein the system comprises an input module, an encoded flash memory array, a controller, a word line control unit, a source line control unit and an output module, wherein the encoded flash memory array is composed of no less than 2 SKm2 (m n+1) field effect transistors arranged in the array. The output module comprises no less than 2K (m n+1) adder, corresponding number of comparators and operational amplifiers, and the encoded flash memory array is connected with the comparator throughbit lines, thereby being connected with the output module. The method comprises: applying a given voltage according to a binary code corresponding to pixel values in the image through the input module, and making only one corresponding field effect transistor on the same bit line at the same time operate through the control of a controller. In this way, the influence of NOR Flash element fluctuation on computational accuracy is effectively reduced, and the robustness of convolution computation system is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits and its manufacture, and more specifically relates to a flash memory system and method for implementing image convolution operation assisted by an adder, which are used to realize fast and accurate image convolution. Background technique [0002] Convolution operation is an important operation in analytical mathematics and is widely used in digital signal processing and machine learning. Convolution operation is actually a weighted summation process. In the traditional CPU computing structure, convolution operation is often divided into multiplication and addition operations step by step, so the efficiency of convolution operation is not high. In order to improve the efficiency of convolution operation implementation, a vertical cross array structure is proposed. This structure not only has the advantages of simple fabrication, low cost, high integration density, and eas...

AI Technical Summary

Problems solved by technology

People have proposed a coded flash memory system based on the analog operation of the NOR Flash structure, but in this implementation, when the NOR Flash unit performs PROGRAM programming operations, it will be in the floating gate layer during the tunneling process. The introduction of movable charges will cause the threshold voltage to rise, and when the ERASE erase operation is performed, the movable charges introduced during the tunneling process will be erased, and the threshold voltage will drop

Therefore, when the threshold fluctuation between NOR Flash units is high, the accuracy of convolution calculation becomes unguaranteed, which increases the complexity of output unit design

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