A convolutional neural network accelerator circuit based on a fast filtering algorithm

A convolutional neural network and filtering algorithm technology, applied in the field of convolutional neural network accelerator circuits, can solve problems such as reducing the utilization rate of computing units and consuming large hardware resources

Active Publication Date: 2019-06-28
CHONGQING UNIV OF POSTS & TELECOMM
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Problems solved by technology

For example, on the basis of the direct convolution structure, some literature proposes to add enough computing resources to perform convolution calculation in parallel to generate a row of ...

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  • A convolutional neural network accelerator circuit based on a fast filtering algorithm
  • A convolutional neural network accelerator circuit based on a fast filtering algorithm
  • A convolutional neural network accelerator circuit based on a fast filtering algorithm

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Embodiment Construction

[0035] The technical solutions in the embodiments of the present invention will be described clearly and in detail below with reference to the drawings in the embodiments of the present invention. The described embodiments are only some of the embodiments of the invention.

[0036] The technical scheme that the present invention solves the problems of the technologies described above is:

[0037] like figure 1 It is a system block diagram for implementing a convolutional neural network accelerator circuit provided by the present invention. This block diagram describes the layer-by-layer acceleration hardware architecture for implementing CNN on FPGA. The architecture does not design specific hardware for each layer. Instead, a set of hardware is designed and then reused in the different layers that need to be used, where the line cache loop control unit decides when to start each hardware unit. This architecture can realize the calculation of multiple layers in CNN with le...

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Abstract

The invention discloses a convolutional neural network accelerator circuit based on a fast filtering algorithm. In order to reduce the calculation amount of a convolutional neural network algorithm (CNN), the method provided by the invention utilizes a fast filtering algorithm to eliminate the redundancy of overlapped region calculation between convolutional windows in two-dimensional convolutionoperation, so that the algorithm strength is reduced, and the convolution calculation efficiency is improved. Next, a convolution calculation acceleration unit of a four-parallel fast filtering algorithm is designed, and the unit is realized by adopting a parallel filtering structure which is composed of a plurality of small filters and is low in complexity. For the programmable FPGA design, not only can the consumption of hardware resources be reduced, but also the running speed can be increased. Meanwhile, the activation function is subjected to optimization design, and a hardware circuit ofthe activation function (sigmoid) is designed by using a piecewise fitting method combining a lookup table and a polynomial, so that the hardware circuit of the approximate activation function is ensured not to reduce the precision.

Description

technical field [0001] The invention belongs to the field of digital signal processing and digital integrated circuit design, and more specifically relates to a convolutional neural network accelerator circuit based on a fast filtering algorithm. Its main application fields include image recognition, image filtering, and image compression. Background technique [0002] Convolutional neural network (CNN) is a deep learning algorithm originated from artificial neural network, which has a strong ability to resist displacement and deformation interference in image processing. At the same time, due to the remarkable achievements of CNN in solving advanced abstract cognitive problems, it has been more and more widely used in image classification, pattern recognition, face detection and other fields. Among them, the recognition of handwritten characters in images often uses convolutional neural network algorithms. In the convolutional neural network algorithm, the convolution oper...

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Application Information

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IPC IPC(8): G06N3/063
CPCY02D10/00
Inventor 王巍周凯利王伊昌王广赵汝法袁军
Owner CHONGQING UNIV OF POSTS & TELECOMM
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