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LED epitaxial wafer and manufacturing method thereof

A technology for light-emitting diodes and manufacturing methods, applied in electrical components, nanotechnology, circuits, etc., can solve the problems of reducing the radiative recombination efficiency of electrons and holes, reducing luminous efficiency, etc., so as to improve the radiative recombination rate, improve luminous efficiency, reduce The effect of the polarization effect

Active Publication Date: 2019-06-28
HC SEMITEK SUZHOU
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Problems solved by technology

[0005] There is a polarization effect between the InGaN quantum well layer and the GaN quantum barrier layer due to lattice mismatch, and the polarization effect will generate a polarized electric field in the quantum well layer, causing the energy band of the quantum well layer to tilt, making electrons and holes Spatial separation reduces the overlap of electron wave function and hole wave function, reduces the radiative recombination efficiency of electrons and holes, and greatly reduces the luminous efficiency of LEDs

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  • LED epitaxial wafer and manufacturing method thereof
  • LED epitaxial wafer and manufacturing method thereof
  • LED epitaxial wafer and manufacturing method thereof

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Embodiment Construction

[0029] In order to make the object, technical solution and advantages of the present invention clearer, the implementation manner of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0030] An embodiment of the present invention provides a light emitting diode epitaxial wafer, figure 1 It is a schematic structural diagram of a light-emitting diode epitaxial wafer provided by an embodiment of the present invention, as shown in figure 1 As shown, the light-emitting diode epitaxial wafer includes a substrate 1, a buffer layer 2, an undoped GaN layer 3, an N-type layer 4, a multi-quantum well layer 5, an electron blocking layer 6, and a P Type layer 7 and P-type contact layer 8.

[0031] figure 2 is a schematic structural diagram of a multi-quantum well layer provided by an embodiment of the present invention, such as figure 2 As shown, the multiple quantum well layer 5 includes multiple quantum well layers 51 and...

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Abstract

The invention discloses an LED epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The multi-quantum well layer of the LED epitaxial wafer includes alternately grown multiple quantum well layers and multiple quantum barrier layers. Each quantum well layer includes a first sub-layer, a second sub-layer and a third sub-layer which are successively stacked. The first sub-layer, the second sub-layer, and the third sub-layer are all InxGa1-xN layers, 0<x<1. The In components in the first sub-layer and the third sub-layer accounts for 25% to 35%of the In component in the second sub-layer. The part of each quantum well layer in contact with the quantum barrier layer is low in In component content, which can weaken a polarization effect due tolattice mismatch at an interface between the quantum well layer and the quantum barrier layer and improve the radiation recombination rate of electrons and holes, thereby improving the luminous efficiency of the LED. The middle part of each quantum well layer has higher In component content, which can further improve the luminous concentration of the LED.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof. Background technique [0002] LED (Light Emitting Diode, Light Emitting Diode) is a semiconductor electronic component that can emit light. As an efficient, environmentally friendly and green new solid-state lighting source, it is being rapidly and widely used, such as traffic lights, car interior and exterior lights, urban landscape lighting, mobile phone backlights, etc. [0003] The existing LED epitaxial wafer includes a substrate, a buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, a P-type layer and a P-type contact layer stacked sequentially on the substrate. The multiple quantum well layers include a plurality of InGaN quantum well layers and a plurality of GaN quantum barrier layers grown alternately, the growth conditions of each ...

Claims

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Application Information

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IPC IPC(8): H01L33/06H01L33/32H01L33/00B82Y40/00
Inventor 洪威威王倩周飚胡加辉
Owner HC SEMITEK SUZHOU
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