Method for fabricating N-type solar cell
A technology of solar cells and fabrication methods, which are applied to circuits, photovoltaic power generation, electrical components, etc., can solve the problems of destroying the passivation effect of the TOPCon structure, reducing the open-circuit voltage and conversion efficiency of solar cells, etc. Voltage and conversion efficiency improvement, effect of improving open circuit voltage and conversion efficiency
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Embodiment 1
[0046] refer to Figure 1-Figure 6 , to introduce the fabrication method of the N-type solar cell of this embodiment. First, the N-type silicon substrate 1 is textured on both sides, and then the N-type silicon substrate 1 is diffused with boron to form a P-type doped layer 2 on the front surface of the N-type silicon substrate 1 as a front emitter. During the boron diffusion process, the back edge of the N-type silicon substrate is also affected by the boron diffusion, forming a P-type doped region (not shown in the figure). Therefore, after boron diffusion, the N-type silicon substrate is etched backside to remove the P-type doped regions at these edges, resulting in the following image 3 structure shown.
[0047] Then refer to Figure 4 Phosphorus ion implantation is performed on the entire back surface of the N-type silicon substrate to form an N-type doped layer 3 as a phosphorus back field, wherein the implantation energy of phosphorus ions is 10keV, and the dose is ...
Embodiment 2
[0052] First according to the front process described in embodiment 1 to obtain such as image 3 The structure shown, next, differs from Example 1 in that:
[0053] refer to Figure 7 , in the back field process, local phosphorus implantation is used to form an N-type doped region 31 only in a local region of the N-type silicon substrate 1, and the width of the N-type doped region 31 is 200um. Phosphorus ion implantation energy is 10keV, dose is 2e15 / cm 2 .
[0054] Then refer to Figure 8 , using a thermal oxidation process to form silicon oxide 4 with a thickness of 2nm. Subsequently, N-type polysilicon is formed on silicon oxide 4 , specifically, phosphorous-doped polysilicon with a thickness of 300 nm is formed by PECVD, followed by annealing at 850° C. for 30 minutes to form N-type polysilicon 5 . Then screen print the back electrode 6 on the N-type polysilicon 5 at the position corresponding to the N-type doped region 31, and then sinter to obtain Figure 9 structu...
Embodiment 3
[0057] The basic principle of embodiment 3 is the same as that of embodiment 1, and between step S6 and step S7 also includes forming a passivation layer on the front surface of the N-type silicon substrate. In this embodiment, Al with a thickness of 5nm 2 o 3 as a passivation layer.
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