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Three-dimensional stacked cis and its forming method

A stacking and three-dimensional technology, applied in the field of three-dimensional stacked CIS and its formation, can solve the problems that three-dimensional stacked CIS is difficult to cooperate with solder ball array packaging technology

Active Publication Date: 2021-11-30
淮安西德工业设计有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] However, the three-dimensional stacked CIS formed in the prior art is difficult to cooperate with the ball grid array packaging technology (BallGrid Array, BGA)

Method used

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  • Three-dimensional stacked cis and its forming method
  • Three-dimensional stacked cis and its forming method

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Embodiment Construction

[0026] In the existing three-dimensional stacked CIS technology, the pixel wafer is first bonded to the carrier wafer, and then the pixel wafer is thinned, and then bonded to the logic wafer from the back side for the second time.

[0027] Figure 1 to Figure 3 It is a schematic diagram of a cross-sectional structure of a device corresponding to each step in a method for forming a three-dimensional stacked CIS in the prior art.

[0028] refer to figure 1 , providing a pixel wafer 120, the front side of the pixel wafer 120 has a pixel metal interconnection structure 122, providing a carrier wafer 100, and bonding the carrier wafer 100 and the front side of the pixel wafer 120 through a first bonding Layer 102 is bonded.

[0029] refer to figure 2 Thinning the pixel wafer 120 from the back side of the pixel wafer 120 to provide a logic wafer 110, the front side of the logic wafer 110 has a logic metal interconnection structure 112, the pixel wafer 120 The back side of the l...

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PUM

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Abstract

A three-dimensional stacked CIS and a forming method thereof, the method comprising: providing a logic wafer, the front side of the logic wafer has a logic metal interconnection structure; forming solder balls on the surface of the logic metal interconnection structure; providing Carrying a wafer, bonding the front of the carrying wafer and the logic wafer through a first bonding layer, the first bonding layer covers the solder balls; providing a pixel wafer, the pixel wafer The front side of the circle has a pixel metal interconnection structure; the front side of the pixel wafer is bonded to the back side of the logic wafer; the carrier wafer and the first bonding layer are removed to expose the Solder balls. The solution of the present invention can realize BGA packaging by using solder balls.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a three-dimensional stacked CIS and a forming method thereof. Background technique [0002] The image sensor is the core component of the camera equipment, which realizes the image capture function by converting the optical signal into an electrical signal. Taking Complementary Metal Oxide Semiconductor Image Sensors (CMOS Image Sensors, CIS) devices as an example, due to their advantages of low power consumption and high signal-to-noise ratio, they have been widely used in various fields. [0003] 3D-Stack CIS was developed to support the demand for higher quality images. Specifically, 3D-Stack CIS can separately manufacture the logic wafer and the pixel wafer, and then bond the front side of the logic wafer and the front side of the pixel wafer, because the pixel part and the logic circuit part are independent of each other , so the pixel part can be optim...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/146
CPCH01L27/1462H01L27/14634H01L27/14636H01L27/14685H01L27/14687H01L27/1469
Inventor 晁阳黄晓橹新居英明马星
Owner 淮安西德工业设计有限公司
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