Delay unit, voltage-controlled oscillator and frequency band extension method of voltage-controlled oscillator
A voltage-controlled oscillator and delay unit technology, applied in power oscillators, electrical components, etc., can solve problems such as insufficient frequency band coverage, reduced voltage-controlled oscillator output clock swing, etc., and achieve linearization of current regulation , the effect of reducing disturbance and speeding up
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Embodiment 1
[0047] refer to figure 1 and Figure 5 , the voltage controlled oscillator includes a bias module and a three-stage cascaded delay unit. Each delay unit includes input pair transistors NMOS transistors M1 and M2; cross-coupling transistors NMOS transistors M3 and M4; tail current transistors NMOS transistors M5 and M6; variable resistor arrays R1, R2 and variable capacitor arrays C1 and C2; The variable capacitance arrays C1 and C2 have the same structure.
[0048] refer to Figure 5 and Figure 6 , The variable capacitor arrays C1 and C2 are both 3bit controlled. Wherein, the variable capacitor array C1 includes a first switch tube sn1, a first switch tube sn2, a first switch tube sn3, a capacitor cn1, a capacitor cn2 and a capacitor cn3. The first switch tube sn1, the first switch tube sn2 and the first switch tube sn3 are all NMOS tubes.
[0049] The gate of the first switching tube sn1 is connected to the control signal selcap, the source of the first switc...
Embodiment 2
[0059] The structure of embodiment 2 is similar to that of embodiment 1, the only difference is that the MOS transistors M1-M6 in embodiment 2 are all PMOS transistors.
Embodiment 3
[0061] Embodiment 3 is similar in structure to Embodiment 2, and the only difference is that in Embodiment 3, both the first switching transistor and the second switching transistor are PMOS transistors.
[0062] refer to Figure 9 and Figure 10 , The variable capacitor arrays C1 and C2 are both 3bit controlled. Wherein, the variable capacitor array C1 includes a first switch tube sn1, a first switch tube sn2, a first switch tube sn3, a capacitor cn1, a capacitor cn2 and a capacitor cn3. The gate of the first switching tube sn1 is connected to the control signal selcap, and the source of the first switching tube sn1 is connected to the voltage source V DD , the drain of the first switching tube sn1 is connected to one end of the capacitor cn1. The other end of the capacitor cn1 is connected to the node between the variable resistor array R1 and the PMOS transistor M1, the gate of the first switching transistor sn2 is connected to the control signal selcap, and the s...
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