Memristor with two-dimensional material heterojunction and preparation method thereof
A two-dimensional material, heterojunction technology, applied in the field of microelectronics, can solve problems such as difficult to meet application requirements, no one has provided new memristors, etc., to reduce growth time and capital costs, ultra-thin thickness, and reduce manufacturing costs. Effect
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Embodiment 1
[0044] In the following embodiments, different electrode materials and different intermediate dielectric layers (ie, different two-dimensional material heterojunction layers) are used to realize the preparation of novel memristor devices.
[0045] combine figure 2 Embodiment 1 is specifically introduced as follows:
[0046] The two-dimensional material heterojunction memristor in Example 1 includes sequentially forming a bottom electrode layer and a memristive dielectric layer on the substrate, and forming a top electrode layer on the memristive dielectric layer, and the memristive dielectric layer is Two-dimensional material heterojunction. The bottom electrode layer of this embodiment 1 uses ITO conductive glass; the middle memristive dielectric layer is WS prepared by solid phase vulcanization method. 2 / MoS 2 The heterojunction has a thickness of 5nm; the top electrode layer is made of metal aluminum film with a thickness of 100nm.
[0047] The preparation method of t...
Embodiment 2
[0060] In this embodiment, except for the intermediate dielectric layer WS 2 / MoS 2 The thickness of the heterojunction is 20nm, and the thickness of the tungsten sulfide and the molybdenum sulfide are both 10nm. Other specific implementation methods are the same as the above-mentioned embodiment 1.
[0061] Further, in this embodiment, for the WS through the semiconductor parameter analyzer 2 / MoS 2Heterojunction memristors were tested electrically. Figure 7 Shown is the test chart of the current-voltage characteristic curve of the memristor in the initial state under the action of the DC sweep voltage of this embodiment.
Embodiment 3
[0063] In this embodiment, except that the top electrode layer is Ag with a thickness of 100 nm, other specific implementation methods are the same as the above embodiment 1.
[0064] Further, in this embodiment, for the WS through the semiconductor parameter analyzer 2 / MoS 2 Heterojunction memristors were tested electrically. Figure 8 Shown is the test chart of the current-voltage characteristic curve of the memristor in the initial state under the action of the DC sweep voltage of this embodiment.
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