CMOS level shifter, operation method, device and equipment
A level shifter and converter technology, which is applied to logic circuit interface devices, logic circuit connection/interface layout, electrical components, etc., can solve the problem of inability to use the EN signal port, etc., to reduce leakage, reduce chip area, The effect of reducing power consumption
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[0034] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to make a clearer and clearer definition of the protection scope of the present invention.
[0035] image 3 Shown is a CMOS level shifter. The CMOS level shifter includes a first NOT gate 101, a first low voltage to high voltage converter 102, a second low voltage to high voltage converter 103, a second NOT gate 104, a NOR gate 105, a third NOT gate 106, and a NAND gate. Gate 107, the fourth non-gate 108.
[0036] The first enable signal is input to the first NOT gate 101, the first low-voltage to high-voltage converter 102 with two signal input terminals is input through the output terminal of the first NOT gate 101, and the other signal input of the first low-voltage to high-voltage converter 102 The terminal receives t...
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