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CMOS level shifter, operation method, device and equipment

A level shifter and converter technology, which is applied to logic circuit interface devices, logic circuit connection/interface layout, electrical components, etc., can solve the problem of inability to use the EN signal port, etc., to reduce leakage, reduce chip area, The effect of reducing power consumption

Active Publication Date: 2019-12-06
CHONGQING BAIRUI INTERNET ELECTRONICS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This 1.2V to 3.3V level translation cannot work without a 1.2V supply voltage, so it cannot be used to control the EN signal port of the PMU

Method used

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  • CMOS level shifter, operation method, device and equipment
  • CMOS level shifter, operation method, device and equipment
  • CMOS level shifter, operation method, device and equipment

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Embodiment Construction

[0034] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to make a clearer and clearer definition of the protection scope of the present invention.

[0035] image 3 Shown is a CMOS level shifter. The CMOS level shifter includes a first NOT gate 101, a first low voltage to high voltage converter 102, a second low voltage to high voltage converter 103, a second NOT gate 104, a NOR gate 105, a third NOT gate 106, and a NAND gate. Gate 107, the fourth non-gate 108.

[0036] The first enable signal is input to the first NOT gate 101, the first low-voltage to high-voltage converter 102 with two signal input terminals is input through the output terminal of the first NOT gate 101, and the other signal input of the first low-voltage to high-voltage converter 102 The terminal receives t...

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PUM

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Abstract

The invention discloses a CMOS (Complementary Metal-Oxide-Semiconductor Transistor) level shifter, an operation method and equipment, and belongs to the technical field of electronics and communication. The CMOS level shifter is composed of two low-voltage-to-high-voltage converters, four NOT gates, an NAND gate and an NOR gate. When the CMOS level shifter is applied to chip system design and equipment comprising the chip, on the premise that a high-level signal is provided for a power management unit (PMU), the area of the chip is greatly reduced, electric leakage is reduced, and the power consumption of a circuit is further reduced.

Description

Technical field [0001] The invention relates to the field of electronics and communication technology, in particular to a CMOS level converter, an operating method, a device, and equipment. Background technique [0002] In the Bluetooth low energy chip system (BLE SOC), the control signal received by the power management unit (PMU) is a 3.3V signal, but the register of the digital chip system (SOC) that controls the PMU is a 1.2V signal. When the PMU is just powered on, the 1.2V power supply for the digital circuit has not been established. Therefore, a level converter without 1.2V is needed to convert the 1.2V control signal into a 3.3V control signal. [0003] Figure one Shown is a conventional 1.2V to 3.3V level converter without a 1.2V power supply, which consists of an NMOS tube (M1) and a load resistor R. The 1.2V signal is input from the gate of the NMOS tube (M1) and output from the drain. In order to make the current as small as possible, the load resistance R is usually...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185
CPCH03K19/0013H03K19/017509H03K19/018507
Inventor 苏杰汤剑桥徐祎喆朱勇
Owner CHONGQING BAIRUI INTERNET ELECTRONICS TECH CO LTD