Spin orbit torque magnetic memory

Abstract

The invention provides a spin orbit torque magnetic memory. The spin orbit torque magnetic memory comprises a magnetic tunnel junction, a metal electrode, a bit line, a source line, a first word line,a second word line, a first field effect transistor and a second field effect transistor, the metal electrode surface is close to the memory layer of the magnetic tunnel junction; the first field effect transistor is connected with the first word line, the bit line and the first end of the metal electrode; the second end of the metal electrode is connected with the source line; the second field effect transistor is connected with the second word line, the bit line and the magnetic tunnel junction. A storage unit of the magnetic memory adopts field-effect tubes with different sizes to respectively control read-write operation, and the read-write field-effect tubes are arranged in a staggered manner, so that the area is saved. When the magnetic memory performs a read operation, a read current passes through the magnetic tunnel junction; when the magnetic memory performs a write operation, the write current partially flows through the magnetic tunnel junction and partially flows throughthe metal electrode or completely flows through the metal electrode. The spin-orbit magnetic moment memory provided by the invention is helpful for simultaneously realizing high-speed read-write operation, long erasing and writing service life and small size of the memory.

Description

technical field [0001] The invention relates to a storage device, in particular to a spin-orbit moment magnetic memory, and belongs to the technical field of integrated circuit memory chips. Background technique [0002] MRAM is a new memory and storage technology that can be read and written as fast as SRAM / DRAM, and can permanently retain data after power failure like Flash memory. Its economy is quite good, and the silicon area occupied per unit capacity has a great advantage over SRAM, and also has advantages over NOR Flash, which is often used in such chips, and has greater advantages than embedded NOR Flash. Its performance is also quite good, the read and write latency is close to the best SRAM, and the power consumption is the best among various memory and storage technologies. Moreover, unlike DRAM and Flash, MRAM is not compatible with standard CMOS semiconductor processes. MRAM can be integrated into a chip with logic circuits. [0003] The principle of MRAM is ...

AI Technical Summary

Problems solved by technology

The patent does not propose a feasible memory array unit design, nor does it mention the method of read and write operations

Images