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Array substrate and manufacturing method thereof

A technology of an array substrate and a manufacturing method, applied in the field of liquid crystal displays, can solve problems such as high mask cost, and achieve the effect of reducing the number of masks used and solving the high mask cost

Inactive Publication Date: 2020-04-10
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In order to effectively solve the technical problem of the high mask cost of the current low temperature polycrystalline oxide (Low Temperature Poly-Oxide, LTPO) array substrate without affecting the compatibility between the LTPS thin film transistor process and the oxide thin film transistor process, this disclosure provides A method for manufacturing an array substrate

Method used

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  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof

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Embodiment Construction

[0022] see Figure 1 to Figure 12 , the first embodiment of the present disclosure provides a method for manufacturing an array substrate 1000, which includes steps S1-S20.

[0023] Step S1: Provide a substrate 10, wherein the substrate 10 includes a display area AA and a gate driver circuit area GOA surrounding the display area AA (see figure 1 ). The substrate 10 can be a transparent substrate. The substrate 10 can be made of non-metallic materials such as glass, quartz and transparent resin with certain firmness and light guide.

[0024] Step S2: coating a buffer layer 20 on the substrate 10 (please refer to figure 1 ). The buffer layer 20 may be composed of SiOx, SiNx or a combination thereof.

[0025] Step S3: Form a polysilicon layer 30 on the buffer layer 20 in the gate drive circuit area GOA (please refer to figure 1 ). This step includes: forming an amorphous silicon layer on the buffer layer 20 , performing crystallization treatment by laser annealing to for...

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Abstract

The invention discloses a manufacturing method of an array substrate. The method comprises the following steps of (1) in a photoetching process, taking a photoresist pattern as a mask, forming a firstgate precursor of an LTPS thin film transistor and a second gate precursor of an oxide thin film transistor; (2) carrying out ion heavy doping by taking the photoresist pattern as the mask, forming ion heavily doped regions at the two opposite sides of the polycrystalline silicon layer; (3) etching the first gate precursor and the second gate precursor to form a first grid electrode and a secondgrid electrode; (4) removing the photoresist pattern, taking the first grid electrode the mask to carry out ion light doping, forming ion lightly doped regions at the two opposite sides of the polycrystalline silicon layer; and (5) forming two first source and drain electrodes of the LTPS thin film transistor and two second source and drain electrodes of the oxide thin film transistor in another photoetching process so as to reduce the number of the required masks under the condition that the compatibility of the LTPS thin film transistor process and the oxide thin film transistor process is not influenced. The invention further discloses the array substrate manufactured through the method.

Description

technical field [0001] The disclosure relates to the field of liquid crystal display (Liquid Crystal Display, LCD) technology, in particular to an array substrate and a manufacturing method thereof. Background technique [0002] LCD is widely used due to its advantages of high image quality, power saving, thinness and lightness. In recent years, LCDs have been continuously developed towards narrow bezels and low power consumption. In order to make LCD more power-saving with limited space and battery capacity, Low Temperature Poly-Oxide (LowTemperature Poly-Oxide, LTPO) technology came into being. LTPO technology generally uses low temperature polysilicon (Low Temperature Poly-Silicon, LTPS) thin film transistors in the gate driver on array (GOA) area of ​​the array substrate, which has the advantages of high mobility, small size, and fast charging and can effectively Reduce border size. In addition, an oxide thin film transistor, such as an indium gallium zinc oxide (IGZO...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L21/77G02F1/1362
CPCH01L27/1288H01L27/127H01L27/1229G02F1/136227
Inventor 李治福肖军城艾飞尹国恒
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
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