Shield gate trench MOSFET

Abstract

The invention discloses a shield gate trench metal oxide semiconductor field effect transistor (MOSFET). The structure comprises a primitive cell region and a peripheral region, a device unit structure of a shield gate trench MOSFET is formed in the primitive cell region, a trench MOS capacitor used for reducing nonlinearity of output capacitance of the shield gate trench MOSFET is formed in the peripheral region, and the trench MOS capacitor comprises a second gate structure which is formed in a second trench and comprises a second polycrystalline silicon shield field plate, wherein the second trench is formed in a first epitaxial layer doped with the first conductivity type, and a second shielding dielectric layer is isolated between the second polycrystalline silicon shielding field plate and the first epitaxial layer, the source region is not formed on the surface of the first epitaxial layer covered on the side surface of the second trench, and the first epitaxial layer on the side surface of the second trench and the first epitaxial layer of the primitive cell region form the drift region of the whole device; the drain region of the whole device is formed at the bottom of thefirst epitaxial layer; and the top of the second polycrystalline silicon shielding field plate is connected to the source electrode through a contact hole. According to the invention, the minimum value of the output capacitance can be improved, and the nonlinearity of the output capacitance is improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit, in particular to a shielded gate trench (SGT) MOSFET. Background technique [0002] like figure 1 Shown is the structural schematic diagram of the device unit structure of the existing first shielded gate trench MOSFET; the existing first shielded gate trench MOSFET is formed by parallel connection of multiple device unit structures in the original cell region, each The device unit structure includes: [0003] The first gate structure is formed in the first trench, including the first polysilicon shielding field plate 3 and the first polysilicon gate 8 stacked together; the first trench is formed in the first conductivity type doped In the impurity first epitaxial layer 2, a first shielding dielectric layer 4 is isolated between the first polysilicon shielding field plate 3 and the first epitaxial layer 2, and the first polysilicon gate 8 A first gate dielectric layer 12 is isolated from t...

AI Technical Summary

Problems solved by technology

[0020] like image 3 Shown is the output capacitance curve of the existing trench MOSFET; where curve 101 is the output capacitance curve of the existing trench MOSFET, the abscissa of the output capacitance curve is the drain voltage, the ordinate is the normalized capacitance, and the normalized Capacitor 1 has a capacitance of 1 when the drain voltage is 0V. It can be seen that the output capacitance at 40V is less than 20% when the drain voltage is 0V. When the drain voltage increases from 0V to 40V, the output capacitance is less than the original 1. / 7, so the input capacitance of existing devices drops dramatically with increasing drain voltage

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