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Chip packaging heat dissipation structure and preparation method thereof

A technology of heat dissipation structure and chip packaging, applied in electrical components, electric solid state devices, circuits, etc., can solve the problems of low heat dissipation efficiency and poor packaging reliability.

Pending Publication Date: 2020-07-03
CHINA KEY SYST & INTEGRATED CIRCUIT
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a chip packaging heat dissipation structure and its preparation method to solve the problems of low heat dissipation efficiency and poor packaging reliability of the existing packaging structure

Method used

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  • Chip packaging heat dissipation structure and preparation method thereof
  • Chip packaging heat dissipation structure and preparation method thereof
  • Chip packaging heat dissipation structure and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0037] The invention provides a chip packaging heat dissipation structure, the structure of which is as follows: figure 1 As shown, it includes a silicon substrate 11 , a heat sink 12 , a chip slot 13 , a chip 14 , an insertion layer 15 and solder balls 16 . The heat dissipation groove 12 is etched on the front side of the silicon substrate 11, the chip groove 13 is etched on the back side of the silicon substrate 11, and the heat dissipation groove 12 and the chip groove 13 are connected; the chip 14 is pasted in the chip groove 13 by thermally conductive glue, and the back of the chip 14 is flush with the bottom surface of the chip groove 13, and the front of the chip 14 is flush with the opening surface of the chip groove 13; Layer 15 has the function of electrical interconnection and is formed on the bottom of the silicon substrate 11, and the solder balls are formed on the surface of the insertion layer.

[0038] The heat sink 12 is filled with a metal material through a...

Embodiment 2

[0042] The invention provides a method for preparing a chip packaging heat dissipation structure, comprising the following steps:

[0043] A silicon substrate 11 is provided, and a heat sink 12 is made on the front side of the silicon substrate 11 by photolithography and silicon dry etching processes, such as figure 2 shown;

[0044] Fill the heat sink 12 and completely cover the entire surface of the silicon substrate 11 by electroplating a metal material through an electroplating process, such as image 3 Shown; Wherein, the metal material is preferably metal copper, aluminum, titanium-tungsten alloy can also be selected;

[0045] Polish and grind the metal material by grinding and chemical mechanical polishing until the pattern of the heat dissipation groove 12 is exposed, such as Figure 4 shown;

[0046] Fabricate a chip groove 13 on the back side of the silicon substrate 11 by photolithography and silicon dry etching process, such as Figure 5 As shown; the depth of...

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Abstract

The invention discloses a chip packaging heat dissipation structure and a preparation method thereof, belonging to the technical field of integrated circuit packaging. The chip packaging heat dissipation structure comprises a silicon substrate, heat dissipation grooves, chip grooves, chips, an insertion layer and solder balls, wherein the heat dissipation grooves are etched in the front surface ofthe silicon substrate, the chip grooves are etched in the back surface of the silicon substrate, the heat dissipation grooves communicate with the chip grooves, and the heat dissipation grooves are filled with electroplating metal; chips are pasted in the chip grooves, the back surfaces of the chips are flush with the bottom surfaces of the chip grooves, and the front surfaces of the chips are flush with the opened surfaces of the chip grooves; the insertion layer is manufactured at the bottom of the silicon substrate; and the solder balls are manufactured on the surface of the insertion layer. According to the invention, a wafer-level packaging process is used for manufacturing, the heat dissipation groove is formed in a package and filled with the metal to serve as the heat dissipationstructure, so the heat dissipation structure is in contact with the back surface of the chip to form a direct heat dissipation channel, thermal resistance is lowered, a heat dissipation area is enlarged, heat dissipation efficiency is effectively improved, and chip packaging reliability is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit packaging, in particular to a heat dissipation structure for chip packaging and a preparation method thereof. Background technique [0002] The new generation of high-density chip packaging technology integrates chips of different materials and functions, and realizes complete system functions in a small-volume packaging structure. With the increase of integration density, especially the integration of a large number of high-power radio frequency chips and high-speed processing chips, a lot of heat will be generated in a small integration space. Since the chip is embedded in an organic material with poor heat dissipation capability, the heat cannot be dissipated quickly, which will cause the temperature in the package structure to rise sharply, which will lead to chip burnout, interconnection metal melting, thermal mismatch damage and other package failures, resulting in system performa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/31H01L23/367H01L23/498
CPCH01L23/3128H01L23/49816H01L23/3672H01L2224/18
Inventor 王刚夏晨辉李杨王成迁朱家昌浦杰王波
Owner CHINA KEY SYST & INTEGRATED CIRCUIT