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Charge pump circuit

A charge pump and circuit technology, applied in the field of circuits and systems, can solve the problems of maximum output voltage reverse breakdown voltage limitation, charge leakage, etc., to increase the maximum output voltage, increase the reverse breakdown voltage, and improve work efficiency and the effect of current drive capability

Active Publication Date: 2020-08-11
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional cross-coupled charge pump circuit has the problem of reverse loss. The reverse loss is the phenomenon of charge leakage caused by the simultaneous conduction of the MOS tubes when the clock signal changes.
Moreover, the traditional charge pump circuit has the problem that the maximum output voltage that can be tolerated is limited by the reverse breakdown voltage of the substrate diode of the MOS transistor.

Method used

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Experimental program
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Embodiment

[0014] Embodiment: a kind of charge pump circuit, in the present invention, the charge pump circuit that described substrate terminal is connected separately is as figure 1 As shown, it includes the first NMOS transistor M 1 , the second NMOS tube M 2 , the third NMOS tube M 3 , the fourth NMOS tube M 4 , the fifth NMOS tube M 5 , the sixth NMOS tube M 6 , the seventh NMOS tube M 7 , the sixth NMOS tube M 6 , the first capacitance C 1 , the second capacitance C 2 , the third capacitor C 3 , the fourth capacitor C 4 , the fifth capacitor C 5 , the sixth capacitance C 6 and output capacitor C OUT ; Wherein, the first capacitance C 1 One end of is connected to the first clock signal CLK 1 , the other end is connected to the second NMOS tube M 2 The drain and the eighth NMOS transistor M 8 source; the second capacitor C 2 Connect one end of the second clock signal CLK 2 , the other end is connected to the first NMOS tube M 1 The drain and the seventh NMOS transi...

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Abstract

The invention discloses a charge pump circuit. The charge pump circuit comprises a first NMOS transistor M1, a second NMOS transistor M2, and a third NMOS transistor M3, a fourth NMOS transistor M4, afifth NMOS transistor M5, a sixth NMOS transistor M6, a seventh NMOS transistor M7, an eighth NMOS transistor M8, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitorC4, a fifth capacitor C5, a sixth capacitor C6 and an output capacitor COUT. The charge pump circuit is advantaged in that a state of an NMOS tube is controlled through clock signals with different phases, so reverse loss is effectively avoided, and working efficiency and the current driving capability of the charge pump are improved; substrate ends of the NMOS transistors in the charge pump circuit can be connected with a specific potential in a unified manner, so a reverse breakdown voltage of a substrate diode is increased, and the maximum output voltage which can be borne by a charge pumpis improved.

Description

technical field [0001] The invention relates to a charge pump circuit, which belongs to the technical field of circuits and systems. Background technique [0002] With the wide application of non-volatile memory, writing and erasing of data requires a working voltage much higher than the power supply voltage, and the charge pump circuit can realize the promotion of a lower power supply voltage to a higher working voltage. The traditional cross-coupled charge pump circuit has the problem of reverse loss. The reverse loss is the phenomenon of charge leakage caused by the simultaneous conduction of MOS transistors when the clock signal changes. Moreover, the traditional charge pump circuit has the problem that the tolerable maximum output voltage is limited by the reverse breakdown voltage of the substrate diode of the MOS transistor. Contents of the invention [0003] Aiming at the problem of reverse loss in the above-mentioned traditional cross-coupled charge pump and the ...

Claims

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Application Information

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IPC IPC(8): H02M3/07
CPCH02M3/073H02M1/0054H02M3/075Y02B70/10
Inventor 周怡鑫王科平王志功
Owner SOUTHEAST UNIV