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Horizontal nanochannel array, micro-nanofluidic chip and manufacturing method thereof

A manufacturing method and nanochannel technology, applied in nanotechnology, chemical instruments and methods, laboratory equipment, etc., can solve problems such as inability to mass produce, complex fabrication methods of micro-nano flow channel chips, and incompatibility between technology and integrated circuit technology , to achieve the effect of simple process

Active Publication Date: 2022-03-08
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, the manufacturing methods of micro-nano flow channel chips used to make horizontal structures are complicated and the process is not compatible with integrated circuit technology, and the lithography efficiency of electron beam lithography is low, and it cannot be mass-produced.

Method used

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  • Horizontal nanochannel array, micro-nanofluidic chip and manufacturing method thereof
  • Horizontal nanochannel array, micro-nanofluidic chip and manufacturing method thereof
  • Horizontal nanochannel array, micro-nanofluidic chip and manufacturing method thereof

Examples

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Embodiment 1

[0034] In the first exemplary embodiment of the present invention, a method of manufacturing a horizontal nanochannel array, such as figure 1 As shown, including the following steps:

[0035] Step 1: Form a graphical mask layer 2 on the substrate 1;

[0036] Step 2: The substrate 1 is etched to form a plurality of scallop columns 3;

[0037] Step 3: Using self-limiting oxidation, a horizontal nanowire array 4 is formed on the scallop column 3;

[0038] Step 4: Fill the etching region of the substrate 1;

[0039] Step 5: Release the horizontal nano-channel array 5 by wet corrosion release horizontal nano-channel array 5.

[0040] In an embodiment of the invention, if image 3 As shown, step 1 specifically includes the following steps:

[0041] Sub-step 111: Form a mask layer on the substrate 1;

[0042] More specifically, the mask layer is from the lower to upper, and the silicon oxide layer 21 and the silicon nitride layer 22 may be a chemical vapor deposition method or a thermal o...

Embodiment 2

[0071] In a second exemplary embodiment of the present invention, a method of fabricating a horizontal nanochannel array is provided, wherein the embodiment is different from that of the first embodiment in that the substrate 1 is etched in the step 2. The specific step of several sectors 3 is, etching the substrate 1 is etched to form a plurality of scallop column 3 using the Bosch process.

[0072] Among them, the Bosch process is specifically C. 4 Fly 8 SF 6 The gas is repeatedly deposited and etched by the substrate 1, forming a plurality of scallop column 3;

[0073] Among them, the number of etching cycles is the same as the number of nanowires in the horizontal nanowire array 4.

Embodiment 3

[0076] In a third exemplary embodiment of the present invention, a method of fabricating a horizontal nanochannel array is provided, wherein the embodiment is different from that of Example 1 is: Figure 4 As shown, step 1 includes the following steps:

[0077] Sub-step 121: Sequentially form the silicon oxide layer 21 and silicon layer 23 on the substrate 1;

[0078] Sub-step 122: Anisotropic etching of the silicon layer 23 to form a silicon step;

[0079] Sub-step 123: A silicon nitride layer 22 is formed on the silicon oxide layer 21 having a silicon step;

[0080] Sub-step 124: Adding from self-alignment etching to form a silicon nitride side wall;

[0081] Sub-step 125: Sequentially remove the silicon step and the bare silicon oxide layer 21 by wet corrosion, forming a graphical mask layer 2;

[0082] Wherein, the silicon layer 23 is a polysilicon layer or an amorphous silicon layer;

[0083] In an embodiment of the present invention, the silicon step is a smooth and steepmost...

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Abstract

A horizontal nanochannel array, a micro-nanofluidic chip and a manufacturing method thereof, the manufacturing method comprising the following steps: Step 1: forming a patterned mask layer on a substrate; Step 2: using the patterned mask layer As a mask, the substrate is etched to form several scalloped columns; step 3: using self-limiting oxidation to form a horizontal nanowire array on the scalloped columns; step 4: filling the etched area of ​​the substrate; Step 5: releasing the horizontal nanowire array by wet etching to form a horizontal nanochannel array. The invention proposes a silicon-based horizontal nanochannel array fabrication method which is simple in technique, compatible with integrated circuit technique and suitable for mass production.

Description

Technical field [0001] The present invention relates to the technical field of semiconductor integrated circuits, and more particularly to a horizontal nanochannel array, a micro-gas control chip, and a method of fabricating it. Background technique [0002] Micro-Nano Fluidic Chip is integrated on a chip of a coin size by integrating some of the functional components, forming a micro-nanopic network network throughout the system, thereby achieving part of a conventional chemical or biological laboratory. When the flow path feature size integrated on the micro-stream control chip is reduced to micrometers or even nanoscale, the fluid is different from the common influence of Van Devalz force, static power, capillary force, and the like. Macroscopic fluid characteristics. These features have an important influence on the use of fluid control, biosensor, protein detection, and DNA sequencing. Therefore, in order to explore the special nature of the fluid in the microelectric flow c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): B01L3/00B82Y40/00
CPCB01L3/5027B82Y40/00B01L2200/10B01L2300/0861B01L2300/12
Inventor 周娜李俊杰高建峰杨涛李俊峰王文武
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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