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Method for monitoring radiation resistance of chip

An anti-radiation and irradiation technology, which is applied in the direction of electronic circuit testing, measuring devices, instruments, etc., can solve the problems of long test cycle of anti-radiation performance, achieve high test precision and accuracy, simple device, and ensure accuracy Effect

Active Publication Date: 2020-09-22
XIAN MICROELECTRONICS TECH INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In order to overcome the above-mentioned shortcoming of the prior art, the object of the present invention is to provide a kind of monitoring method of chip anti-irradiation performance, to solve the problem of existing chip anti-irradiation Technical issues with long performance testing cycle

Method used

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  • Method for monitoring radiation resistance of chip
  • Method for monitoring radiation resistance of chip

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0047] First, prepare the MOS structure:

[0048] Step 1, select a substrate sheet whose type is N, whose crystal orientation is 100, and whose resistivity is 4Ω.cm, and grow on its surface with a thickness of The gate dielectric oxide layer;

[0049] Step 2, removing the photoresist on the surface of the substrate and depositing a layer of gate electrode on the entire surface;

[0050] In step 3, a photolithography process is performed on the surface of the gate electrode to etch a test pattern; and an alloy process is performed on the test pattern to form a MOS structure to be tested, such as figure 2 shown.

[0051] Secondly, detect the radiation resistance performance of the gate dielectric on the MOS structure to be tested:

[0052] S1: averagely dissociate the MOS structure prepared above into two regions, one is the irradiated region and the other is the non-irradiated region;

[0053] S2: Test the C-V characteristics of the irradiated area and the non-irradiated ...

Embodiment 2

[0058] In the process of preparing the MOS structure, in step 1, select a substrate sheet whose type is N, crystal orientation is 100, and resistivity is 6Ω.cm, and the thickness is grown on its surface. gate dielectric oxide layer. Other operations are the same as in Embodiment 1.

Embodiment 3

[0060] In the process of preparing the MOS structure, in step 1, select the substrate sheet whose type is N, the crystal orientation is 100, and the resistivity is 7Ω.cm, and the thickness is grown on its surface. gate dielectric oxide layer. Other operations are the same as in Embodiment 1.

[0061] In the above examples, due to the test irradiation area O 2 and non-irradiated area O 1 There are 4 symmetrical and evenly distributed points in each corresponding position, and compare and test at the corresponding positions, and calculate the difference of the tested flat-band voltage. The purpose of the corresponding position comparison test is to avoid the problem of disc uniformity deviation. By comparing and testing the positions of the four regions of the wafer, the four sets of test results are averaged to reduce the test error and ensure the accuracy of the test data.

[0062] It should be noted that in step 1, when growing the gate dielectric layer on the substrate,...

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Abstract

The invention discloses a method for monitoring the radiation resistance of a chip and belongs to the field of a semiconductor integrated circuit. The method comprises the following steps that averagely dissociating a to-be-measured MOS structure is averagely dissociated into two regions, one region is an irradiation region for carrying out an irradiation experiment, the other region is a non-irradiation region which is not subjected to an irradiation experiment, c-V characteristics of the irradiation region and the non-irradiation region are tested respectively, flat-band voltage values of the irradiation region and the non-irradiation region are obtained through calculation, difference between flat-band voltage values of the irradiation region and the non-irradiation region is calculatedto obtain a flat-band voltage variable quantity, and the flat-band voltage variable quantity is the anti-irradiation capacity of the membranous MOS structure. The method provided by the invention issimple in used device, relatively low in cost, easy to operate, relatively high in test precision and accuracy, and capable of covering radiation resistance monitoring of various gate-containing dielectric products in a semiconductor integrated circuit production line.

Description

technical field [0001] The invention belongs to the field of semiconductor integrated circuits and relates to a method for monitoring the anti-radiation performance of a chip. Background technique [0002] With the rapid development of space technology, nuclear technology, and strategic weapon technology, more and more high-performance chips are used in control systems such as artificial earth satellites, spacecraft, and launch vehicles. The irradiation environment will affect the grid dielectric characteristics of chips , changing the threshold of the chip, resulting in abnormal equipment performance, so higher requirements are put forward for the radiation resistance performance of the chip. [0003] In order to optimize the radiation resistance of the chip, it is necessary to strengthen the radiation resistance of the gate dielectric. The test method for the chip's radiation resistance performance is to test the changes in parameters such as the chip threshold before and...

Claims

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Application Information

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IPC IPC(8): G01R31/28
CPCG01R31/2881
Inventor 刘如征陈宝忠葛洪磊蒋玉贵
Owner XIAN MICROELECTRONICS TECH INST
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