Multi-port Power Combination Grid Array Antenna Based on Fan-out Wafer Level Packaging
A technology of wafer-level packaging and grid arrays, which is applied to antenna arrays, antennas, and antenna arrays that are powered separately, can solve problems such as high cost, large chip area, and unfavorable heat dissipation, and achieve low cross-polarization levels and compact Effect of Antenna Size
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[0032] The preferred embodiments of the present invention will be further described in detail below.
[0033] like figure 1 and figure 2 As shown, a multi-port power combination grid array antenna based on a fan-out wafer-level packaging, comprising:
[0034] The radio frequency chip 1 is arranged in the substrate layer 6;
[0035] The antenna radiation unit 2 is located in the first RDL layer and is arranged in a grid array, wherein the feeding point is arranged on the intersection of the long side and the short side of the grid of the antenna radiation unit 2;
[0036] The ground plate 3 is arranged in the second RDL layer above the substrate layer 6; the second RDL layer is located below the first RDL layer;
[0037] The feeding network 4 includes an RDL feeder 5 arranged in the third RDL layer, and the third RDL layer is located below the substrate layer 6;
[0038] The back metal plate of the radio frequency chip 1 is connected to the ground plate 3 to realize heat d...
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