Manufacturing method of semiconductor memory

Abstract

The invention relates to a manufacturing method of a semiconductor memory. The manufacturing method comprises the steps of forming a plurality of bit line structures on a semiconductor substrate, extending the bit line structures in the first direction, and repeatedly arranging thebit line structures in the second direction; forming a barrier layer on the semiconductor substrate on which the bit line structures are formed, wherein the barrier layer covers the semiconductor substrate and the plurality of bit line structures; forming a sacrificial material layer filling the grooves between the bit line structures; forming a hard mask pattern, and etching the sacrificial material layer by taking the hard mask pattern as a mask plate to form a plurality of strip-shaped sacrificial spacers extending along a second direction; forming a first protection isolator on the side wall of the sacrificial isolator, wherein the first protection isolator and the bit line structure define a capacitor contact window together; and removing the sacrificial spacers, forming an air gap between the two first protection spacers corresponding to the same sacrificial spacer, and forming a sealing layer at the top of the air gap.

Description

technical field [0001] The invention relates to the technical field of semiconductor storage devices, in particular to a method for manufacturing a semiconductor storage device. Background technique [0002] One of the development trends of DRAM (dynamic Random Access Memory) is to achieve the purpose of producing more chips on one wafer through process scaling and reducing the size of devices such as transistors. However, as the size becomes smaller and smaller, the parasitic capacitance generated between adjacent metal wires will increase, which will cause the reading delay of the internal signal of the DRAM, and the strength will weaken, and more seriously, it will lead to low yield rate or even zero yield of the chip. Effectively reducing parasitic capacitance has become an important topic in advanced semiconductor manufacturing processes. [0003] The currently commonly used DRAM bit line structure often adopts a stacked structure. Silicon nitride is an etching mask la...

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Problems solved by technology

[0004] Based on this, it is necessary to provide a semiconductor storage device manufacturing method for the problem of complex process flow when forming a capacitive contact window

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