Unlock instant, AI-driven research and patent intelligence for your innovation.

Semiconductor structure and manufacturing method thereof

A semiconductor, self-limiting technology, applied in the direction of semiconductor devices, semiconductor/solid-state device parts, microstructure technology, etc., can solve problems such as rotation deviation, inaccurate mask alignment, and influence on accuracy, and achieve a simple and reliable process control, solve inaccurate alignment, and improve alignment accuracy

Pending Publication Date: 2021-05-25
SIWAVE INC
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, inaccurate alignment is common when placing masks manually, including center deviation, that is, the center of the exposure pattern will deviate from the center of the wafer, and the maximum deviation will reach more than ten millimeters; it also includes rotation deviation, that is, the exposure pattern is relative to the wafer. The flat side of the circle will rotate, up to tens of degrees
Although skilled engineers can overcome this problem to a large extent, alignment accuracy is still affected by operational proficiency
[0004] When the pattern on the front and back of the silicon wafer forms a certain deviation, the pattern after deep etching will continue to maintain this deviation, or even amplify this deviation, which will adversely affect the performance of the device

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0041] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention, but not to limit the present invention. In addition, it should be noted that, for the convenience of description, the drawings only show some but not all structures related to the present invention.

[0042] figure 1 A schematic cross-sectional structure diagram of a semiconductor structure provided by an embodiment of the present invention, figure 2 A schematic bottom view of a semiconductor structure provided by an embodiment of the present invention, such as figure 1 and figure 2 As shown, the semiconductor structure provided by the embodiment of the present invention includes a device layer 10 , an isolation layer 11 , an etching barrier layer 12 , a self-limiting etching cavity 13 , a first etching cavity 14 and a subs...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a semiconductor structure and a manufacturing method thereof. The semiconductor structure comprises a device layer, an isolation layer, a corrosion barrier layer, a self-limiting corrosion cavity, a first corrosion cavity and a substrate; the device layer is located on the first side of the substrate, the self-limiting corrosion cavity is located on the second side of the substrate, and the isolation layer and the corrosion barrier layer are located on the side, close to the device layer, of the self-limiting corrosion cavity. The self-limiting corrosion cavity is located in a space defined by the isolation layer and the corrosion barrier layer; the first corrosion cavity is located on the side, away from the device layer, of the self-limiting corrosion cavity; and the first corrosion cavity communicates with the self-limiting corrosion cavity. According to the semiconductor structure and the manufacturing method thereof provided by the invention, the self-limiting corrosion cavity on the second side of the substrate is limited by the corrosion barrier layer formed on the first side of the substrate, so that the patterns on the first side and the second side of the substrate can be positioned and aligned on the first side of the substrate, and the self-limiting corrosion cavity is not influenced by errors of double-sided photoetching; and the alignment precision of the self-limiting corrosion cavity and the device layer is improved.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of semiconductor manufacturing, and in particular, to a semiconductor structure and a manufacturing method thereof. Background technique [0002] In the semiconductor process, double-sided processing is required in some cases, for example, patterns need to be made on the front and back sides of the silicon wafer, especially for some MEMS devices, such as pressure sensors, thermopile temperature sensors and other MEMS devices. Do deep etching so that the final device is a thin film device. Among them, the double-sided processing process requires the use of special equipment double-sided lithography machine, and deep etching can use dry etching or wet etching. [0003] The double-sided lithography machine adopts proximity or contact exposure, that is, the optical system projects the pattern on the silicon wafer at a ratio of 1:1, so the mask used is the same size as the silicon wafer, an...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): B81B7/00B81B7/02B81C1/00
CPCB81B7/0009B81B7/02B81C1/00523B81C1/00555B81C1/00603
Inventor 焦继伟刘京费跃陈思奇
Owner SIWAVE INC