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VPX-based CAN and 1553b dual-redundancy architecture design method

A design method, dual-redundancy technology, applied in the field of dual-redundancy hardware structure of CAN and 1553b, to achieve the effect of improving stability and reliability

Inactive Publication Date: 2021-06-29
BEIHANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a VPX-based CAN and 1553b dual redundant architecture to solve the communication interruption problem caused by electromagnetic environment and device loss in CAN and 1553b communication, and improve the reliability of communication

Method used

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  • VPX-based CAN and 1553b dual-redundancy architecture design method

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Embodiment Construction

[0035] The present invention will be further described in detail with reference to the accompanying drawings and embodiments.

[0036] The present invention designs a completely dual-redundant CAN and 1553b bus communication architecture, and proposes a link self-check and link switching method based on this dual-redundant architecture, thereby improving the link stability of CAN and 1553b and robustness.

[0037] The overall architecture of the system proposed in this design is as follows: figure 1 shown. The present invention takes Figure 2-Figure 5 An implementation scheme of a dual-redundant architecture is shown as an example, and the implementation scheme of link self-checking and link switching of the present invention is introduced in detail.

[0038] Step 1: In this design, two XC7Z045ffg676 chips are used as the main processor and coprocessor of the system, such as figure 2 shown. Let U1 be the main processor, and U2 be the coprocessor.

[0039] Step 2: Since...

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Abstract

The invention relates to a VPX-based CAN and 1553b dual-redundancy architecture design method. The method comprises two MCU chips, a CAN bus transceiver chip, an isolation chip, a 1553b protocol processing chip and a 1553b isolation transformer, and is characterized in that the two MCU chips are connected with a VPX connector through an SRIO bus, and can communicate with an upper computer through an SRIO protocol to report the fault information; when a VPX-based CAN and 1553b dual-redundancy architecture works normally, a self-checking program is started firstly, and after the CAN bus and the 1553b bus pass self-checking, a system starts to carry out a normal working process. According to the present invention, the link self-checking and state reporting functions of the CAN bus and 1553b bus can be realized, the link information can be monitored in real time in the bus link communication process, and the redundant links can be switched timely to ensure that the communication is not interrupted when the link has a fault, thereby improving the stability and reliability of the whole communication link.

Description

technical field [0001] The invention relates to a VPX-based CAN and 1553b dual-redundancy architecture design method, which belongs to the communication field, and in particular to a VPX-based CAN and 1553b dual-redundancy hardware structure, software discrimination and link switching methods. Background technique [0002] CAN (Controller Area Network) is an internationally standardized serial communication protocol and one of the most widely used buses in the world. It has been widely used in automotive computer control systems and embedded industrial control LANs. The 1553b bus is the abbreviation of the MIL-STD-1553B bus. As an information transmission bus standard specially formulated by the U.S. military for aircraft equipment, it is now widely used in various contemporary civil aviation airliners and military aircraft, as well as in aerospace systems. With a wide range of applications. The 15333b bus has a dual-channel design, and the 1553B bus can switch between two ...

Claims

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Application Information

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IPC IPC(8): G05B19/042
CPCG05B19/0421G05B2219/24182
Inventor 刘荣科刘誉楷
Owner BEIHANG UNIV