The invention discloses an IRIG-B (Inter Range
Instrumentation Group) encoding and decoding
system and method based on an FPGA (
Field Programmable Gate Array), belonging to the technical field of communication. The
system and the method solve the problems that a conventional IRIG-B code
processing system needs an external
signal source of IRIG-B codes to accomplish self-inspection on a decoding system, and that the accuracy of a decoding function cannot be verified. The IRIG-B encoding and decoding system based on the FPGA comprises a GPS (
Global Positioning System) / beidou double-system module, the FPGA, a singlechip, a DAC (Digital-to-Analog Converter)
chip, a comparer
chip, a host computer and a PCI (
Peripheral Component Interconnect) adapting card, wherein the GPS / beidou double-system module, the FPGA, the singlechip, the DAC
chip and the comparer are integrated on a board card, and the board card is connected with the host computer through the PCI adapting card. The method comprises the following steps that: the singlechip
decodes received
time information and subsequently inputs the received
time information into a DC (
Direct Current) encoding
control logic module and an AC (Alternative Current) encoding
control logic module of the FPGA so as to
encode a DC code and an AC code; after the encoding is accomplished, the DC code and the AC code are respectively input into the FPGA through an external
loopback and are subsequently decoded; the decoding result is uploaded to the host computer. The technical scheme provided by the invention is applicable to IRIG-B encoding and decoding systems.