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Semiconductor device and manufacturing method thereof

A semiconductor and device technology, applied in the field of semiconductor devices and their manufacturing, can solve the problems of reducing switching time, increasing switching loss, increasing gate charge, etc.

Pending Publication Date: 2021-07-06
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the power management system requires the power semiconductor device to have low parasitic capacitance to reduce the switching loss of the device. The structure proposed by Kenya Kobayashi et al. has a large coupling area between the separated gate and the control gate, which will lead to an increase in gate charge. , thereby reducing the switching time and increasing the switching loss

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0042] Such as figure 2As shown, a semiconductor device includes a first conductivity type substrate 10, a first conductivity type epitaxial layer 11 is arranged on the upper surface of the first conductivity type substrate 10, a groove structure 12 is arranged in the first conductivity type epitaxial layer 11, and the groove structure 12 includes a control gate electrode 15 divided into left and right parts, and a separate gate electrode 14 below the control gate electrode 15, wherein the control gate electrode 15 is located in the upper half of the trench structure 12, and the separate gate electrode 14 is located in the lower half of the trench structure 12. Part; the control gate electrode 15 and the separation gate electrode 14 are separated by the second dielectric layer 132 and the third dielectric layer 133, the third dielectric layer 133 is located above the second dielectric layer 132, and the separation gate electrode 14 is separated from the first conductivity type...

Embodiment 2

[0063] Such as Figure 5 As shown, the difference between this embodiment and the structure described in Embodiment 1 is that the control gate electrode 15 is connected by polysilicon, and its shape includes a horizontal segment of polysilicon, two vertical segments of polysilicon on the left and right connected below the horizontal segment of polysilicon, and the first dielectric layer 131 , the second dielectric layer 132 , the third dielectric layer 133 , and the fourth dielectric layer 135 are all the same kind of dielectric. The area of ​​the control gate is increased, thereby reducing the gate resistance.

Embodiment 3

[0065] Such as Figure 6 As shown, the difference between this embodiment and Embodiment 1 is: the separation gate 14 is Y-shaped polysilicon, including two branches with the upper part obliquely intersecting the center, and a vertical part connected below the two branches, the first dielectric layer 131, the second The second dielectric layer 132, the third dielectric layer 133, and the fourth dielectric layer 135 are all of the same type of dielectric. The shape of the polysilicon splits at a larger angle, allowing for a more uniform optimization of the electric field.

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a first conductive type substrate, a first conductive type epitaxial layer, a groove structure, a control gate electrode, a separation gate electrode, a second dielectric layer, a third dielectric layer, a first dielectric layer, a second conductive type well region, a second conductive type heavily doped region, a gate dielectric layer, a first conductive type heavily doped source region, metal and a fourth dielectric layer. According to the structure, the coupling area of the separation gate electrode and the control gate electrode is reduced, meanwhile, the coupling capacitance, namely the gate source capacitance, between the separation gate electrode and the control gate electrode is reduced, the purposes of high switching speed and low switching loss are achieved, and a semiconductor device is formed.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] In the article "100-V Class Two-step-oxide Field-PlateTrench MOSFET to Achieve Optimum RESURF Effect and Ultralow On-resistance" by Kenya Kobayashi et al., a two-stage split-gate Trench MOSFET is proposed, whose role can greatly optimize silicon The electric field of the layer can increase the withstand voltage or increase the doping while maintaining the same withstand voltage, thereby reducing the on-resistance. However, the power management system requires the power semiconductor device to have low parasitic capacitance to reduce the switching loss of the device. The structure proposed by Kenya Kobayashi et al. has a large coupling area between the separated gate and the control gate, which will lead to an increase in gate charge. , thereby reducing the switching time a...

Claims

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Application Information

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IPC IPC(8): H01L29/423H01L21/28
CPCH01L29/4236H01L29/42376H01L21/28008
Inventor 王卓董仕达王正康乔明张波
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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