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Wafer defect classification method and device, electronic equipment and storage medium

A defect classification and wafer technology, applied in image analysis, image data processing, instruments, etc., to achieve the effect of improving yield, reducing cost, and reducing dependence

Pending Publication Date: 2021-07-09
上海众壹云计算科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0007] In order to partially solve or alleviate the above-mentioned technical problems, the present invention provides a wafer defect classification method based on layered dismantling, which can automatically perform defect classification compared with the manual defect classification method in the prior art

Method used

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  • Wafer defect classification method and device, electronic equipment and storage medium
  • Wafer defect classification method and device, electronic equipment and storage medium
  • Wafer defect classification method and device, electronic equipment and storage medium

Examples

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Embodiment 1

[0045] see figure 1 , is a schematic flow chart of a method in an exemplary embodiment of the present invention, and the method steps in this exemplary embodiment include:

[0046] S102: Collect at least one target image of each target area on the target wafer.

[0047] In some embodiments, during the wafer production process, various defect scanning equipment, such as scanning electron microscope (SEM), X-ray automatic monitoring equipment, infrared imaging spectrometer, automatic optical inspection (AOI), etc., scan each defect in real time. The target image obtained by the target wafer, correspondingly, a plurality of target images (ie, images containing wafer defects) of the target area on the target wafer can be directly obtained from these defect scanning devices. For example, at least one target image of each target area can be acquired from the defect detection device through wired communication or wireless communication, that is, the acquired target image set to be c...

Embodiment 2

[0091] see Figure 5 , is a defect classification device 200 according to an exemplary embodiment of the present invention, and the device includes:

[0092] An image acquisition module 202, configured to acquire at least one target image of each target area on the target wafer;

[0093] The image layering module 204 is configured to perform layering processing on the target image corresponding to the target area based on the pre-stored structural features of the target area, to obtain at least two layered graphics, and layer information corresponding to each layered graphic;

[0094] The defect classification module 206 is configured to perform defect identification and classification on each layered pattern according to the obtained hierarchical information, to obtain at least one target defect pattern and its defect type.

[0095] In some embodiments of the present invention, the target area includes a multi-layer structure, and correspondingly, the structural features inc...

Embodiment 3

[0104] The present invention also provides an electronic device, including a processor 501, a memory 502, and a computer program stored in the memory 502 and operable on the processor 501. When the processor executes the program, the aforementioned method steps. For ease of description, only the parts related to the embodiments of this specification are shown, and for specific technical details that are not disclosed, please refer to the method part of the embodiments of this specification. The electronic equipment can include various electronic equipment, PC computer, network cloud server, even mobile phone, tablet computer, PDA (Personal Digital Assistant, personal digital assistant), POS (Point of Sales, sales terminal), vehicle computer, desktop Computers and other electronic devices.

[0105] specifically, Image 6 Shown is a structural block diagram of electronic equipment related to the technical solutions provided by the embodiments of this specification. The bus 500...

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Abstract

The invention relates to a wafer defect classification method based on layered disassembly. The method comprises the following steps: firstly, collecting at least one target image of each target area on a target wafer; performing hierarchical processing on each target image based on pre-stored structural features of the target area to obtain at least two hierarchical graphs and hierarchical information corresponding to the hierarchical graphs; and performing defect identification and classification on the hierarchical graph according to the hierarchical information to obtain at least one target defect graph and a defect type thereof. According to the invention, the dependence on manpower in the wafer defect classification process can be reduced, so that the wafer defect classification efficiency is improved, the defect classification cost is reduced, the real-time detection on the wafer defects in the production process is realized, the real-time defect information feedback is obtained, and the product yield is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular to a method, device, electronic equipment and computer-readable storage medium for classifying wafer defects based on layered and disassembled defect images. Background technique [0002] With the development of semiconductor device technology, more and more processes are used to manufacture semiconductor devices. The main purpose is to make circuits and electronic components on the wafer, such as transistors, capacitors and logic switches. Oxidation and chemical vapor deposition are performed on the surface, followed by film coating, exposure, development, etching, ion implantation, metal sputtering and other steps, and finally several layers of circuits and components are processed and produced on the wafer. However, due to the complexity of each process in the manufacturing process, the processing of the wafer by each process flow may produce some ...

Claims

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Application Information

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IPC IPC(8): G06T7/00G06K9/62
CPCG06T7/0004G06T2207/20081G06T2207/20084G06T2207/30148G06F18/214G06F18/24
Inventor 沈剑刘迪唐磊胡逸群陈建东
Owner 上海众壹云计算科技有限公司
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