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A Process Method for Improving the Consistency of Epitaxial Wafer Transition Region

A process method and technology of the transition zone, which is applied in the field of silicon epitaxial wafers, the basic semiconductor material, can solve problems such as the influence of the consistency of the edge transition zone and the impact on the device casting results, and achieve the effect of improving the consistency of the transition zone and reducing the deviation

Active Publication Date: 2021-12-17
NANJING GUOSHENG ELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, due to the influence of substrate self-doping factors during the epitaxy process, the consistency of the center and edge transition regions in the epitaxial wafer is greatly affected, which in turn affects the device's casting results.

Method used

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  • A Process Method for Improving the Consistency of Epitaxial Wafer Transition Region
  • A Process Method for Improving the Consistency of Epitaxial Wafer Transition Region
  • A Process Method for Improving the Consistency of Epitaxial Wafer Transition Region

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Effect test

Embodiment 1

[0027] In the first embodiment, a preparatory substrate sheet with a resistivity of 0.002 Ω·cm is selected. In the first section, the variable doping mode is used to select the change interval as 15% of the total thickness, corresponding to a resistivity of 0.1Ω·cm. The doping amount in the second stage is constant, and the doping amount setting value is the doping amount corresponding to the target resistivity of the epitaxial layer. During the epitaxial growth process, the growth temperature is 1040°C, and the growth rate is 2.3µm / min, which can combine figure 2 It can be seen from the longitudinal structure diagram of the center and edge resistivity of the middle and epitaxial wafers. The longitudinal structure diagram of the center and edge resistivity of the epitaxial wafer is as follows. It can be obtained from the test that the percentage deviation of the center and edge transition regions in the wafer to the total epitaxial thickness is about 13%.

Embodiment 2

[0028] In the second embodiment, a preparatory substrate sheet with a resistivity of 0.003 Ω·cm is selected. In the first section, the variable doping mode is used to select the change interval as 25% of the total thickness, corresponding to a resistivity of 0.3Ω·cm. The doping amount in the second stage is constant, and the doping amount setting value is the doping amount corresponding to the target resistivity of the epitaxial layer. During the epitaxial growth process, the growth temperature is 1050°C, and the growth rate is 2.5µm / min, which can combine image 3 It can be seen from the longitudinal structure diagram of the center and edge resistivity of the middle and epitaxial wafers. It can be obtained from the test that the percentage deviation of the center and edge transition regions in the chip to the total epitaxial thickness is about 1%.

Embodiment 3

[0029] In the third embodiment, a preparatory substrate sheet with a resistivity of 0.004Ω·cm is selected. The first section adopts the mode of variable doping to select the change interval as 30% of the total thickness, corresponding to a resistivity of 0.5Ω·cm. The doping amount in the second stage is constant, and the doping amount setting value is the doping amount corresponding to the target resistivity of the epitaxial layer. During the epitaxial growth process, the growth temperature is 1060°C, and the growth rate is 2.8µm / min, which can combine Figure 4 It can be seen from the longitudinal structure diagram of the center and edge resistivity of the middle and epitaxial wafers. It can be obtained from the test that the percentage deviation of the center and edge transition regions in the chip to the total epitaxial thickness is about 4%.

[0030] As a comparative example of the prior art, under the existing process conditions, it can be combined Figure 5 The center...

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Abstract

The invention discloses a process method for improving the consistency of the epitaxial wafer transition region, which comprises the following steps: preparing a substrate sheet: selecting a heavily doped As substrate sheet with a resistivity of 0.002~0.004Ω•cm, epitaxial growth: the source adopts ultra-high purity Trichlorosilane, grow an epitaxial layer with a target thickness, and at the same time pass through a corresponding dopant source. The amount of doping source is divided into two sections: the first section adopts the mode of variable doping, the initial doping flow setting value is 0.1Ω cm ≤ the heavy doping quality corresponding to the resistivity ≤ 0.5Ω cm, The impurity flow setting value is the doping amount corresponding to the target resistivity of the epitaxial layer, the doping amount change rate is constant, and the change range can be selected as 15%~30% of the total thickness; the second stage doping amount is constant, and the doping amount The amount setting value is the doping amount corresponding to the target resistivity of the epitaxial layer. By adopting the process method provided by the invention, the deviation of the center and the edge of the chip is obviously reduced.

Description

technical field [0001] The invention relates to a silicon epitaxial wafer, which is a basic semiconductor material, especially to an epitaxial wafer grown using a heavily doped substrate. Background technique [0002] The epitaxial growth process is a method of depositing a thin layer of a single crystal on the surface of a single crystal substrate. Vapor phase epitaxy is the most widely used due to the good control of impurity concentration and the ability to obtain crystal integrity. [0003] However, due to the influence of substrate self-doping factors during the epitaxial process, the consistency of the center and edge transition regions in the epitaxial wafer is greatly affected, which in turn affects the casting results of the device. [0004] Therefore, urgently need to solve the above-mentioned problem. Contents of the invention [0005] Purpose of the invention: The purpose of the invention is to reduce the influence of the self-doping introduced by the heavily...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): C30B25/02C30B25/14C30B25/16C30B29/06H01L21/02
CPCC30B25/02C30B25/14C30B25/165C30B29/06H01L21/02381H01L21/02532H01L21/02573H01L21/0262
Inventor 魏建宇邓雪华王银海杨帆
Owner NANJING GUOSHENG ELECTRONICS