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NMOS device manufacturing method for improving stress film coverage uniformity, and NMOS device thereof

A device manufacturing method and thin-film covering technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as reducing stress film stress, reducing stress film growth speed, and reducing stress transmission

Pending Publication Date: 2021-09-14
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the field of semiconductor manufacturing, improving the carrier mobility of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has always been a hot topic; nowadays, the industry usually introduces stress engineering or adopts incapable Semiconductor material communication and other methods are used to improve the mobility of carriers (electrons) in N-channel field-effect transistors (NMOS), but with the further shrinking of the device size, the gap between the gates is getting smaller and smaller, and the stress film (SMT SIN ) coverage uniformity (Step Coverage) is getting worse, such as figure 1 , greatly reducing the stress transfer
The current conventional method to improve coverage uniformity is to reduce the growth rate of the stressed film, but this will reduce the stress of the stressed film

Method used

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  • NMOS device manufacturing method for improving stress film coverage uniformity, and NMOS device thereof
  • NMOS device manufacturing method for improving stress film coverage uniformity, and NMOS device thereof
  • NMOS device manufacturing method for improving stress film coverage uniformity, and NMOS device thereof

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Embodiment Construction

[0027] The NMOS device manufacturing method for improving stress film coverage uniformity of the present invention comprises the following steps:

[0028] Step S1, such as image 3 A substrate 1 is provided, and at least two gates 2 are formed on the substrate 1, a first hard mask layer 3 and a second hard mask layer 4 are provided on each gate, and a first hard mask layer 4 is formed on both sides of each gate. One side wall 6 and the second side wall 5. The substrate also includes source and drain electrodes (not shown in the figure)

[0029] The process used in step S1 is a prior art process, and the following is only an exemplary description.

[0030] For example, each region is defined after the substrate is selected, and ion implantation is performed in the defined P well region, exemplarily high-energy boron ion implantation, to form a local P-type region. Rapid thermal annealing (RTP / RTA) after photoresist removal can reduce the diffusion of impurities.

[0031] Ga...

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PUM

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Abstract

The invention discloses an NMOS device manufacturing method for improving the stress film coverage uniformity. The method comprises the following steps: S1, providing a substrate, forming at least two grid electrodes on the substrate, arranging a first hard mask layer and a second hard mask layer on each grid electrode, and arranging a first side wall and a second side wall on two sides of each grid electrode, wherein the substrate further comprises a source electrode and a drain electrode; S2, carrying out ion implantation on the source electrode and the drain electrode; S3, thinning the second side wall; S4, depositing a stress film; S5, carrying out rapid thermal annealing on the stress film; S6, removing the stress film; and S7, removing the hard mask layer; and removing the first hard mask layer and the second hard mask layer on the grid electrodes.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a manufacturing method of an NMOS device and a MOS device thereof for improving the coverage uniformity of a stress film. Background technique [0002] In the field of semiconductor manufacturing, improving the carrier mobility of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) has always been a hot topic; nowadays, the industry usually introduces stress engineering or adopts incapable Semiconductor material communication and other methods are used to improve the mobility of carriers (electrons) in N-channel field-effect transistors (NMOS), but with the further shrinking of the device size, the gap between the gates is getting smaller and smaller, and the stress film (SMT SIN ) coverage uniformity (Step Coverage) is getting worse, such as figure 1 , greatly reducing the stress transmission. The current conventional method to improve cove...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/7842H01L29/66568
Inventor 闻永华廖端泉何志斌
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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