Preparation method of bipolar gating memristor and bipolar gating memristor

Abstract

The invention provides a preparation method of a bipolar gating memristor and a bipolar gating memristor. The preparation method comprises the following steps of: preparing a lower electrode; depositing a resistive material layer on the lower electrode; and depositing an upper electrode on the resistive material layer, specifically, depositing the upper electrode by adopting a magnetron sputtering mode, controlling sputtering power to control metal particles of the upper electrode to have proper kinetic energy, and controlling the vacuum degree of an area where the upper electrode and the resistive material layer are located, so as to enable the upper electrode and the resistive material layer to spontaneously generate oxidation-reduction reaction in the deposition process of the upper electrode so as to form a built-in bipolar gating layer, and further depositing the upper electrode on the built-in bipolar gating layer, or selecting a material with the activity higher than that of metal elements of the resistive material layer as a metal material of the upper electrode, so as to make the upper electrode and the resistive material layer spontaneously generate oxidation-reduction reaction in the deposition process of the upper electrode, so as to form a built-in bipolar gating layer and further depositing the upper electrode on the built-in bipolar gating layer. According to the preparation method of the bipolar gating memristor and the bipolar gating memristor of the invention, the performance of the bipolar gating device is improved.

Description

technical field [0001] The invention belongs to the field of microelectronic devices, and more specifically relates to a preparation method of a bipolar gating memristor and a bipolar gating memristor. Background technique [0002] In the context of the Internet of Things era, unprecedented data volume growth is driving the development of high-efficiency, cheap, and micro-storage technologies. Due to the bottleneck of Moore's Law, the continued scaling of Complementary Metal Oxide Semiconductor (CMOS) will bring about a substantial increase in cost. In recent years, memristors, which are cheap, simple in structure, scalable, low in power consumption, reliable, and nonvolatile, have become one of the most promising storage technologies for logistics network applications. Due to the simple sandwich device structure, memristors are suitable for large-scale 2D or 3D integration using passive cross-array structures. The characteristic of the interleaved array structure is that ...

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Problems solved by technology

[0005] Aiming at the defects of the prior art, the object of the present invention is to provide a method for preparing a bipolar gating memristor and a bipolar gating memristor, aiming at solving the problem of the existing high-performance bipolar gating device preparation process The difficulty is more complicated, such as the need to pr

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