Convolutional neural network accelerator based on FPGA and optimization method thereof

Abstract

The invention relates to the technical field of neural network calculation, and particularly provides an FPGA-based convolutional neural network accelerator and an optimization method thereof. The invention discloses a convolutional neural network accelerator based on an FPGA (Field Programmable Gate Array). The accelerator comprises a program instruction storage unit, a program instruction decoding unit, a data control unit, a data buffer unit, a parameter buffer unit, an off-chip storage unit, a parallel processing unit, an image buffer unit, an image splicing unit and an off-chip storage unit. The invention discloses an optimization method of a convolutional neural network accelerator based on an FPGA (Field Programmable Gate Array). The optimization method comprises the following steps: step 1, acquiring clock cycles used by forward reasoning of forward reasoning instructions CNn of different operation types; 2, constructing the number of clock cycles used by forward reasoning once of the convolutional neural network; 3, constructing a hardware resource constraint expression; 4, constructing and solving a constrained optimization function F '; and 5, setting the number of 3 * 3 convolution units, 1 * 1 convolution units and pooling units according to the optimal solution of the optimization function F '.

Description

technical field [0001] The present application relates to the technical field of neural network computing, in particular, to an FPGA-based convolutional neural network accelerator and its optimization method. Background technique [0002] With the continuous development of neural networks, the network complexity is getting higher and higher, and the requirements for hardware computing capabilities are also increasing. As a general-purpose processor, the CPU can no longer meet the needs of practical applications. For this reason, research on the deployment of neural networks on hardware platforms has become a hotspot. Existing deep learning frameworks, such as PyTorch, Caffe, TensorFlow, etc., are all based on GPU for network acceleration. Although the GPU has powerful computing power, it has disadvantages such as high price, high power consumption, high noise, and large volume. FPGA has the advantages of low power consumption, customization, reconfigurability, small size, ...

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Problems solved by technology

[0007] The purpose of the present invention is to, aiming at the deficiencies in the above-mentioned prior art, provide a kind of FPGA-based convolutional neural network accelerator and its optimization method, to solve the problem of mismatching the number of various parallel computing units due to the lack of consideration in the prior art The problem that leads to the decline of the forward reasoning speed of the convolutional neural network model

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