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Preparation method of semiconductor structure and semiconductor structure

A semiconductor and gate structure technology, which is applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve the problems of complex preparation process of resistance structure, high production cost, and large space occupied by resistance structure, so as to save space and reduce The effect of manufacturing difficulty and reducing production cost

Pending Publication Date: 2022-04-29
CHANGXIN MEMORY TECH INC
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  • Description
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  • Application Information

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Problems solved by technology

[0004] The technical problem solved by the embodiments of the present invention is to provide a method for preparing a semiconductor structure and a semiconductor structure, which solve the problems of complicated preparation process of the resistance structure, large space occupation of the resistance structure, and high production cost

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  • Preparation method of semiconductor structure and semiconductor structure
  • Preparation method of semiconductor structure and semiconductor structure
  • Preparation method of semiconductor structure and semiconductor structure

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Embodiment Construction

[0028] It can be seen from the background art that the preparation process of the resistance structure in the related art is complicated, the resistance structure occupies a large space, and the production cost is high.

[0029] refer to figure 1 , figure 1 It is a schematic diagram of a semiconductor structure in the related art. The substrate 100 includes an array region 110 and a peripheral region 120; the array region 110 has a first isolation structure 500 and an active region 800; the active region 800 and the first isolation structure 500 have There is a gate structure 400 and an oxide layer 300, the gate structure 400 includes a barrier layer 410 and a conductive layer 420; the peripheral region 120 has a second isolation structure 600; the surface of the substrate 100 has an insulating layer 700, and the substrate 100 of the peripheral region 120 There is also a resistive structure 200 on the surface.

[0030] After analysis, it is found that the resistance structur...

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Abstract

The embodiment of the invention provides a preparation method of a semiconductor structure and the semiconductor structure, and the preparation method of the semiconductor structure comprises the steps: providing a substrate which comprises an array region and a peripheral region, the array region is provided with an active region and a first isolation structure, and the peripheral region is provided with a second isolation structure; and forming a gate structure in the array region, and forming a resistor structure in the second isolation structure in the peripheral region in the process step of forming the gate structure. According to the preparation method of the semiconductor structure provided by the embodiment of the invention, the production process of the resistor structure can be simplified, the occupied space of the resistor structure is reduced, and the production cost of the semiconductor structure is reduced.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductors, and in particular to a method for preparing a semiconductor structure and the semiconductor structure. Background technique [0002] The memory in the semiconductor structure is a memory component used to store programs and various data information. Random access memory is divided into static random access memory and dynamic random access memory. In the manufacture and design of DRAM, the resistance structure required by the circuit is often involved, such as the step-down and current-limiting resistance used in the circuit, the sampling resistance in the voltage stabilization circuit, and the timing resistance in the delay circuit. [0003] A layer of doped polysilicon is usually formed on the substrate surface of the semiconductor structure to obtain the resistive structure required for the circuit. However, forming the resistance structure in this way requires a complicated...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8242H01L27/108H10B12/00
CPCH10B12/50H10B12/09H01L27/0629H10B12/488H10B12/053H01L28/24H01L21/76852H01L21/76877H01L21/823456
Inventor 龙强
Owner CHANGXIN MEMORY TECH INC