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Ultrahigh throughput IFFT/FFT modulation and demodulation method

An ultra-high throughput, modulation and demodulation technology, applied in the field of ultra-high throughput IFFT/FFT modulation and demodulation, can solve the problems of long critical path delay, complex power consumption control logic, high power consumption, etc., and achieve area overhead The effect of being small, running frequently, and having a short critical path

Active Publication Date: 2022-04-29
SUN YAT SEN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Using multiple low-throughput (serial / partially parallel) modules brings the following disadvantages: larger chip area overhead; longer critical path delay; requires consecutive multiple sets of FFT inputs to gradually reach the target throughput ; Need more buffers to store multiple sets of FFT inputs; need more complex power control logic, otherwise it will lead to higher power consumption; increase the overall delay of modulation and demodulation; according to the purchased IP, the complete module The implementation will be limited to a specific architecture (such as a specific commercial company's FPGA)

Method used

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  • Ultrahigh throughput IFFT/FFT modulation and demodulation method

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Experimental program
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Embodiment 1

[0091] This embodiment provides an ultra-high throughput IFFT / FFT modulation and demodulation method, comprising the following steps:

[0092] Cooley-Tukey FFT process:

[0093] S11. The n-point DFT is defined as:

[0094]

[0095] In the formula, , v is the demodulation input, V is the demodulation output, j is a pure imaginary number, and N represents the length of FFT / IFFT; is the base of the Fourier transform rotation primer; i is the serial number of the time domain signal; k is the serial number of the frequency domain signal;

[0096] S12. For n-point DFT, decompose it into multiple DFT sub-modules, set , introducing the following coefficient substitutions:

[0097]

[0098] S13. After the substitution, use the row-column interleaver to change the order of the output variables, and replace the one-dimensional index with the two-dimensional index:

[0099]

[0100] S14. Bring the coefficient substitution into the original formula, and record get:

[0...

Embodiment 2

[0143] The present embodiment provides a kind of realization method of the FFT / IFFT of incomplete expansion; Provided the realization method of the FFT / IFFT of complete expansion (parallelism is P, every cycle produces a group of conversion results) in embodiment 1, this method The implementation steps include (taking 64-point FFT as an example):

[0144] Determine the factorization of n, 64 = 16 * 4 = 4 * 4 * 4, therefore, the whole module is divided into 3 columns of DFT-4, each column has 16 DFT-4;

[0145] Implement all DFT modules according to the implementation method of DFT-4;

[0146] According to the implementation method of interleaver and complex multiplier, the first two columns of DFT-4 modules are combined into four FFT-16 modules through (4,4) interleaver and complex multiplier.

[0147] When the required throughput is lower than that provided by the fully unrolled FFT / IFFT block, a method is proposed that makes it possible to implement an FFT / IFFT block with a...

Embodiment 3

[0155] When IFFT / FFT is used for modulation and demodulation of a multi-carrier system, the input of IFFT is the expanded conjugate symmetric sequence, and the output is a real sequence; the input of FFT is a real sequence, and the output is a conjugate symmetric sequence.

[0156] For two conjugate symmetric sequences that need to be transformed :

[0157] Preprocessing: Constructing Sequences ;

[0158] Perform IFFT transformation on D to obtain d;

[0159] Post-processing: it is hoped that the Separated from D, since IDFT is a linear transformation, there is ,because Both are real sequences, so the real and imaginary parts of the result can be output separately;

[0160] For real sequence FFT, use the following algorithm to simplify, for two real sequences that need to be transformed :

[0161] Preprocessing: Constructing Sequences ;

[0162] Perform FFT transformation on d to obtain D;

[0163] Post-processing: it is hoped that the Separated from D, the...

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Abstract

The invention relates to the technical field of communication, in particular to an ultra-high throughput IFFT / FFT (Inverse Fast Fourier Transform / Fast Fourier Transform) modulation and demodulation method, which comprises the following steps of: using a framework which is completely expanded and specially optimizes twiddle factors as a basis for implementation, and performing compact data rearrangement by using a row-column interleaver so as to realize the decomposition of the IFFT / FFT framework; the invention has the advantages of smaller area overhead, shorter critical path, higher operation frequency and lower power consumption, and can be used for different system structures.

Description

technical field [0001] The present invention relates to the technical field of communication, and more specifically, relates to an ultra-high throughput IFFT / FFT modulation and demodulation method. Background technique [0002] An ultra-high-speed multi-carrier communication system requires an ultra-high-throughput IFFT / FFT module. Taking the 50G access network baseband chip using SEFDM as an example, it needs to achieve a throughput of more than 250M times / s when iteratively decoding the baseband receiver. The 512-point IFFT demodulation module and the 512-point FFT modulation module currently have no public method that can directly generate such a high-throughput IFFT / FFT design. An alternative method that the industry may adopt is to use multiple radix-2 / radix-4 serial N-point IFFT / FFT IP blocks on the market to combine, through the buffering of multiple sets of FFT input data, in a longer period of time Periodically, obtain the same computing power as the target in the ...

Claims

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Application Information

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IPC IPC(8): H04L27/26
CPCH04L27/2628H04L27/265
Inventor 李天瑞黄以华
Owner SUN YAT SEN UNIV
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