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Integrated self-biased pMOS low turn-off loss SJ-LIGBT device

A technology of turn-off loss and self-biasing, applied in the field of SJ-LIGBT devices, can solve the problems of device influence, no carrier extraction channel, tail current with long turn-off time, etc., to reduce the saturation current density and optimize the electric field. , Enhance the effect of short-circuit safe working characteristics

Pending Publication Date: 2022-05-10
CHONGQING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The traditional LIGBT still has some shortcomings that cannot be ignored in use: for example, in the turn-off phase, there are a large number of carriers in the drift region that need to be extracted. There is no additional carrier extraction channel, and the carriers can only pass through recombination. Disappeared, resulting in a longer turn-off time and tail current, affecting the use of the device

Method used

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  • Integrated self-biased pMOS low turn-off loss SJ-LIGBT device
  • Integrated self-biased pMOS low turn-off loss SJ-LIGBT device
  • Integrated self-biased pMOS low turn-off loss SJ-LIGBT device

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Embodiment 1

[0041] figure 1 It is an SJ-LIGBT device with integrated self-biased pMOS and low turn-off loss proposed by the present invention, and it is a schematic structural diagram of Embodiment 1. Self-biased pMOS includes P+ drain, N-type region, P+ source, metal gate and trench gate short circuit, no additional gate signal control is required. The pMOS source is shorted to the LIGBT drift region.

[0042] Such as figure 1 As shown, the implementation of the present invention proposes an integrated self-biased pMOS low turn-off loss SJ-LIGBT device, the LIGBT device includes a P+ collector 1, an N-type buffer layer 2, an N-type drift region 3, and a P-column region 4. P+ emitter 5, N+ electron emitter 6, P-body7, P-top region 8, N-type region 9, P+ source 10, P+ drain 11, floating ohmic contact 12, emitter 13, gate 14. A collector electrode 15, a silicon dioxide insulating layer 16, and a P-type substrate 17. The SJ-LIGBT device integrating self-biased pMOS low turn-off loss is c...

Embodiment 2

[0046] figure 2 A schematic structural diagram of Embodiment 2 of the LIGBT device provided by the present invention. On the basis of Example 1, an N-type hole blocking layer is introduced on the lower side of the p-body, the lower side of the p-body is flush with the upper side of the N-type hole blocking layer, and the lower side is flush with the upper side of the N-type drift region. Side flush.

[0047] Such as figure 2As shown, the implementation of the present invention proposes an integrated self-biased pMOS low turn-off loss SJ-LIGBT device, the LIGBT device includes a P+ collector 1, an N-type buffer layer 2, an N-type drift region 3, and a P-column region 4. P+ emitter 5, N+ electron emitter 6, P-body7, P-top region 8, N-type region 9, P+ source 10, P+ drain 11, floating ohmic contact 12, emitter 13, gate 14. A collector electrode 15, a silicon dioxide insulating layer 16, a P-type substrate 17, and a hole blocking layer 18. The SJ-LIGBT device integrating sel...

Embodiment 3

[0051] Such as figure 1 As shown, the implementation of the present invention proposes an integrated self-biased pMOS low turn-off loss SJ-LIGBT device, the LIGBT device includes a P+ collector 1, an N-type buffer layer 2, an N-type drift region 3, and a P-column region 4. P+ emitter 5, N+ electron emitter 6, P-body7, P-top region 8, N-type region 9, P+ source 10, P+ drain 11, floating ohmic contact 12, emitter 13, gate 14. Collector electrode 15, silicon dioxide insulating layer 16, P-type substrate 17, P-surface layer 19, N-isolating region 20, N+ surface layer 21. The SJ-LIGBT device integrating self-biased pMOS low turn-off loss is characterized in that 1. The device is divided into a pMOS region, a PN junction region and a LIGBT region from left to right, and the LIGBT region includes a P+ collector 1. N-type buffer layer 2, N-type drift region 3, P column region 4, P+ emitter 5, N+ electron emitter 6, P-body7, P-top region 8, emitter 13, gate 14, collector 15. A silico...

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Abstract

The invention relates to an integrated self-biased pMOS low-turn-off loss SJ-LIGBT device, and belongs to the technical field of semiconductors. According to the invention, (1) the self-biased pMOS comprises a P + drain electrode, an N-type region, a P + source electrode, a metal gate and a trench gate which are in short circuit, and extra gate signal control is not needed; and the source electrode of the pMOS is in short circuit with the drift region of the LIGBT. (3) during forward conduction, the gate-source voltage VGS, P of the pMOS changes along with the collector voltage, and when VGS, Pgt; when VGS, Plt, VGS, VTH, the self-bias pMOS is automatically turned off, and when VGS, Plt; the VTH and the self-biased pMOS are automatically started, holes are extracted through the pMOS, the saturation current density of the device is reduced, and the short-circuit safe working characteristic of the device is enhanced; at the turn-off moment, the device meets VGS and Plt; the VTH and the pMOS are automatically started, holes can be extracted through the pMOS, and turn-off loss is reduced.

Description

technical field [0001] The invention belongs to the technical field of semiconductors and relates to an SJ-LIGBT device integrating self-biased pMOS and low turn-off loss. Background technique [0002] IGBT (Insulated Gate Bipolar Transistor, Insulated Gate Bipolar Transistor) is a bipolar semiconductor power device that combines MOSFET and BJT tube. It has the advantages of reduced conduction voltage, low driving power consumption and high operating frequency, and is widely used. Used in communication technology, new energy equipment and various consumer electronics fields, it is the core device of electronic power system. Among them, LIGBT (Lateral Insulated Gate Bipolar Transistor, Lateral Insulated Gate Bipolar Transistor) is easy to integrate on Si base, and is usually used in SOI-based power intelligent systems, and is a typical representative of bipolar semiconductor devices. [0003] However, since the LIGBT does not have reverse conduction capability, it is usually...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/06H01L29/06
CPCH01L27/0623H01L29/0615
Inventor 陈伟中林徐葳秦海峰魏子凯张红升
Owner CHONGQING UNIV OF POSTS & TELECOMM
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