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Semiconductor device with saturation current self-clamping function and preparation method thereof

A saturation current and semiconductor technology, which is applied in the field of power semiconductor devices with saturation current self-clamping function and its preparation, can solve the problem of increasing the on-state voltage drop of IGBT devices, increasing the on-state loss of devices, and affecting the electronic current of IGBT devices and other problems, to achieve the effect of self-shutdown of the device, improvement of short-circuit capability, and practicability

Inactive Publication Date: 2022-05-27
安建科技(深圳)有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, reducing the effective channel width will affect the electronic current of the IGBT device, causing an increase in the on-state voltage drop of the IGBT device, thereby increasing the on-state loss of the device

Method used

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  • Semiconductor device with saturation current self-clamping function and preparation method thereof
  • Semiconductor device with saturation current self-clamping function and preparation method thereof
  • Semiconductor device with saturation current self-clamping function and preparation method thereof

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Embodiment 1

[0035] figure 1 It is a schematic cross-sectional view 100 of an IGBT device according to the first embodiment of the present invention, a self-clamping function IGBT structure with saturation current, the device structure has: a semiconductor chip 100 includes a first collector 101 at the bottom, a first P Type collector region 102 is located above the first collector electrode 101; located above the first field stop layer 103 (or N buffer layer) is the first lightly doped region N - 104, the first lightly doped region N - Just above 104 is a surface MOS structure, the surface MOS structure consists of a first gate oxide layer 105, a first polysilicon gate 106, a first P-type body region 107 and a first heavily doped N + The emitter region 110 is formed; the first emitter metal 112 passes through the first tungsten plug 111 and the first heavily doped region P + 108 connected. In particular, the first heavily doped N + Below the emitter region 110 and close to the first g...

Embodiment 2

[0050] Figure 10 It is a schematic cross-sectional view 200 of the RC-IGBT device according to the second embodiment of the present invention. The device structure has: a second collector 201 at the bottom, and a second N on the top of the second collector 201, respectively. + The heavily doped region 213 and the second P-type collector region 202 are located above the second field stop layer 203 (or the N buffer layer) as the second N - Lightly doped region 204, second N - Just above the lightly doped region 204 is a surface MOS structure, and the surface MOS structure consists of a second gate oxide layer 205 , a second polysilicon gate 206 , a second P-type body region 207 and a second N + The heavily doped emitter region 210 is formed; the second emitter metal 212 passes through the second tungsten plug 211 and the second P + The heavily doped regions 208 are connected. In particular, the second N + Below the heavily doped emitter region 210 and near the second gate ...

Embodiment 3

[0052] Figure 11 It is a schematic cross-sectional view 300 of the SGT device according to the second embodiment of the present invention. The device structure has: a third collector 301 at the bottom, and a third N above the third collector 301 respectively + Heavily doped region 302, located in the third N + Above the heavily doped region 302 is the third N - Lightly doped region 303, third N - Just above the lightly doped region 303 is a surface MOS structure, the surface MOS structure consists of a polysilicon field plate 304, a third gate oxide layer 305, a third polysilicon gate 306, a third P-type body region 307 and a third N + A heavily doped emitter region 310 is formed. The third emitter metal 312 passes through the third tungsten plug 311 and the third P + The heavily doped regions 308 are connected. In particular, the third N + Below the emitter region 310 and near the third gate oxide layer 305, there are third deep level acceptor impurities 309. The thir...

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Abstract

The invention discloses a semiconductor device with a saturation current self-clamping function and a preparation method thereof, and relates to the field of power semiconductor devices.The deep-energy-level impurities are extracted and introduced, the ionization rate of the deep-energy-level impurities is low or the deep-energy-level impurities cannot be ionized when the device works normally, the influence on the threshold voltage of the device is very small, and the saturation current self-clamping function is achieved. No obvious adverse effect is caused on the characteristics of the device under the normal working condition; however, due to the positive temperature coefficient characteristic of the threshold voltage at high temperature, the saturation current of the device can be suppressed, the short-circuit capability of the device is improved, and dynamic adjustment of the threshold voltage of the device in the temperature change process of the device is realized; the preparation method is compatible with the existing technological process and has practicability.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, in particular to a power semiconductor device with saturation current self-clamping function and a preparation method thereof. Background technique [0002] Power semiconductor devices, especially insulated gate bipolar transistors (IGBTs), are widely used in consumer, automotive and industrial control fields, and are the core components for power conversion, control and transmission. In the complex and changeable operating environment of the power electronic system, it is inevitable to encounter abnormal conditions (such as overvoltage, overcurrent and short circuit, etc.), which will cause damage to the power semiconductor IGBT devices in the system or even the collapse of the entire power electronic system. In order to improve the reliability of the system, the power electronic system will integrate a protection circuit to shut down the power semiconductor IGBT devices working under ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/739H01L29/167H01L21/331
CPCH01L29/7397H01L29/167H01L29/66348
Inventor 冯浩邓菁单建安
Owner 安建科技(深圳)有限公司
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