Switched capacitor circuit

A switched capacitor circuit and switch technology, applied to electronic switches, electrical components, electrical analog memory, etc., to achieve a reliable compensation effect

Pending Publication Date: 2022-05-27
英尼维顺股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] In summary, there is an unmet need for a practical and efficient circuit design to counteract switch charge injection and / or clock feedthrough in switched capacitor circuits

Method used

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  • Switched capacitor circuit
  • Switched capacitor circuit
  • Switched capacitor circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0041] Figure 5 shows a metal oxide semiconductor field effect transistor based switch according to a preferred embodiment. The switch includes a first metal oxide semiconductor field effect transistor 1 (hereinafter referred to as MOS), a second MOS 2, a first capacitor C1 and a second capacitor C2. A first MOS 1 serving as a switch MOS connects the first node T1 to the second node T2. The source or drain of the first MOS 1 may be connected to the first node T1 such that the other end is connected to the second node T2. The source of the second MOS 2 serving as a dummy MOS is connected to its drain, and both are connected only to the second node T2. The first MOS 1 and the second MOS 2 are of the same type, but controlled by inverted signals S1 and S2. The first MOS 1 and the second MOS 2 may be N-type or P-type, and the following only takes N-type as an example. The size of the second MOS 2 is half of the channel area of ​​the first MOS 1 . In particular, the second MOS ...

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Abstract

The invention relates to a switched capacitor circuit comprising a metal oxide semiconductor field effect transistor-based switch comprising: a first metal oxide semiconductor field effect transistor (1) having a gate, a source and a drain, where the source is connected to a first node (T1) and the drain is connected to a second node (T2), or the drain is connected to a first node (T1) and the source is connected to a second node (T2); a second metal oxide semiconductor field effect transistor (2) having a gate, a source and a drain, where the source is connected to the drain, and the source and the drain together are connected to a second node (T2); a first capacitor (C1) connected between the first node (T1) and the third node (T3); and a second capacitor (C2) connected between the second node (T2) and the third node (T3).

Description

technical field [0001] The present invention relates to a switched capacitor circuit comprising a metal oxide semiconductor field effect transistor. Background technique [0002] Switched capacitor circuits are widely used in various analog and mixed-signal circuits such as sample-and-hold circuits and analog-to-digital converters. The accuracy of switched capacitor circuits is often limited by charge injection and clock feedthrough caused by switches made of metal-oxide-semiconductor field-effect transistors (MOSFETs or MOSs). Charge injection occurs when the switch MOS is turned off, and the remaining channel charge in the switch MOS is injected into its source and drain terminals. Clock feedthrough is caused by the gate-source / gate-drain capacitance of the switch MOS, which is between the digital signal connected to the gate of the switch MOS and the analog signal at the source or drain of the switch MOS of undesired capacitive coupling. Both charge injection and clock...

Claims

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Application Information

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Patent Type & AuthorityApplications(China)
IPC IPC(8): H03K17/16H03K17/687G11C27/02
CPCH03K17/162G11C27/02H03K17/6871H03K17/6872H03K2217/0054H03M1/403H03K17/165H03K17/687
Inventor李成汉
Owner英尼维顺股份有限公司