Semiconductor structure and preparation method thereof

Abstract

The invention relates to a semiconductor structure and a preparation method thereof. The preparation method of the semiconductor structure comprises the steps of providing a substrate; forming a groove in the substrate, wherein the bottom and the side wall of the groove are covered by the dielectric layer; forming a sacrificial layer in the dielectric layer; forming a conductive layer, wherein the upper surface of the conductive layer is lower than the upper surface of the substrate; removing the sacrificial layer to form air side walls on two opposite sides of the conductive layer; and forming an insulation protection layer, wherein the insulation protection layer covers the upper surface of the conductive layer and the top of the air side wall. According to the preparation method of the semiconductor structure, the conductive layer with relatively high height is formed in the groove, and the cross sectional area of the conductive layer can be increased under the condition that the line width of the word line structure is kept unchanged, so that the word line resistance is greatly reduced, the word line conduction current is improved, and the response speed of a transistor is improved; in addition, the air side walls are formed on the two opposite sides of the conducting layer, so that the electric field between the grid electrode and the drain electrode can be reduced, the GIDL is reduced, the crystal power consumption of the transistor is reduced, and the reliability of the transistor is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a preparation method thereof. Background technique [0002] With the development of DRAM towards high speed, high integration density and low power consumption, the size of the DRAM device structure is getting smaller and smaller, especially in the process of manufacturing DRAM devices with smaller line width, the material, shape, size of the word line As well as electrical properties and other aspects have higher requirements. [0003] The critical dimension of the word line structure is constantly shrinking, but the requirements for the electrical performance of the transistor have not decreased, which is prone to generate a large gate-induced drain leakage current (GIDL) in the transistor, which seriously affects the reliability of the transistor. At the same time, the resistance of the word line is closely related to ...

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Problems solved by technology

[0004] Based on this, it is necessary to provide a semiconductor structure and its preparation method to reduce the resistance of the word line structure, reduce the GIDL current, and improve the reliability of the device in view of the problems that the shrinking of the word line structure causes the increase of the word line resistance and the increase of the GIDL current. sex and responsiveness

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