Soft start circuit applied to DC-DC converter

Abstract

The invention relates to a soft start circuit applied to a DC-DC converter. The soft start circuit comprises a bias current generating circuit, a narrow pulse clock generator, a ramp voltage generator, a first comparator and an alternative circuit. Wherein the bias current generating circuit is used for generating fixed bias current; the narrow pulse clock generator is used for generating a narrow pulse clock signal; the ramp voltage generator is used for generating a ramp voltage; the first comparator is used for comparing the ramp voltage with an external reference voltage and outputting an enable signal; and the either-or circuit selects and outputs the ramp-up reference voltage according to the enable signal. According to the soft start circuit, intermittent charging of the capacitor in the ramp voltage generator is controlled through the narrow pulse clock signal, the rising speed of the ramp voltage is controlled, and the soft start time is prolonged. Through circuit configuration, the needed capacitance value can be reduced, the capacitor size and the circuit size are reduced, and then full integration of capacitors in the soft start circuit is achieved.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a soft-start circuit applied to a DC-DC converter. Background technique [0002] With the rapid development of communication, computer and consumer electronics fields, the demand for power management is also increasing. However, during the startup process, the DC-DC converter is prone to inrush current and output voltage overshoot, which can damage the power transistor, subsequent circuits and even the power supply battery. To prevent this, the most common method is to apply a soft-start circuit that controls the speed at which the DC-DC converter output voltage ramps up from zero to a target value. like figure 1 As shown in (a), the conventional soft-start circuit applies a current source to charge a capacitor to limit the error amplifier reference voltage V REF The rate of rise, V REF waveform such as figure 1 shown in (b). Make the duty cycl...

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Problems solved by technology

[0003] However, since the reference voltage V REF If it needs to rise at a relatively small rate, a large capacitance value is required to realize this method, so the capacitance in the traditional soft-start circuit is difficult to integrate inside the chip, which increases the overall cost and circuit size

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