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Method for mfg. mask ROM

A technology of read-only memory and manufacturing method, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as inaccurate implantation of ions, and achieve improved margins, reduced RC delay, and improved operation speed. Effect

Inactive Publication Date: 2006-02-01
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At this time, when there is an alignment error between the memory device and the encoding mask, the ions cannot be accurately implanted in the channel area to be encoded, which will lead to the so-called tail bit effect (Tail Bit Effect)

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  • Method for mfg. mask ROM
  • Method for mfg. mask ROM
  • Method for mfg. mask ROM

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Experimental program
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Embodiment Construction

[0038] figure 2 As shown, it is a top view of a mask-mode ROM device according to a preferred embodiment of the present invention; Figure 3A to Figure 3J As shown, it is a schematic cross-sectional view of the manufacturing process of a mask-mode read-only memory according to a preferred embodiment of the present invention, which is figure 2 The cross-sectional schematic diagram of X-X' and Y-Y' in the middle.

[0039] Please refer to figure 2 and Figure 3A , Figure 3A for figure 2 The cross-sectional schematic diagram of X-X' in the middle. The manufacturing method of the mask mode ROM of the present invention firstly provides a substrate 200, wherein the substrate 200 has a memory cell area 300 and a peripheral circuit area 302, and an isolation structure 201 has been formed in the peripheral circuit area 302 to define a Active area 204 . Here, the isolation structure 201 may be a field oxidation isolation structure or a shallow trench isolation structure.

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Abstract

A process method for a mask read-only memory is to form an imbedded position line in the base first and a thick silicon oxide on the base, then to form a strip silicon nitride layer on the thick silicon oxide layer, to be removed partly to expose the base, and form a gate oxide layer on the exposed base surface, then to form a polysilicon layer on the base to be etched to expose the silicon nitride to form several code memory units in which, the code memory units with gate oxide layer is the logic status "1" and the one with thick silicon oxide layer is "0", finally, the strip silicon nitride is removed.

Description

technical field [0001] The present invention relates to a manufacturing method of a memory device, and in particular to a manufacturing method of a mask-mode read-only memory (Mask ROM). Background technique [0002] Mask ROM is the most basic type of ROM. It mainly relies on the ion implantation process to adjust its threshold voltage (Threshold Voltage), so as to achieve the purpose of controlling the memory cell to be turned on (On) or turned off (Off). When the product of the mask mode ROM is changed, the manufacturing process does not need to be greatly modified, but only a set of photomasks used is changed, so it is very suitable for mass production, and even part of the manufacturing process can be made first. When the finished semi-finished products are ordered to the factory, these semi-finished products can be quickly programmed (Programming), which can effectively shorten the delivery time. [0003] Figure 1A to Figure 1C As shown, it is a schematic cross-secti...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/8246H10B20/00
Inventor 潘仁泉
Owner MACRONIX INT CO LTD