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Method for producing mask read-only storage of flat unit structure

A cell structure, mask read-only technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as long production time and cost, many unit processes, and reduced integration.

Inactive Publication Date: 2003-04-09
DONGBUANAM SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, in this case, not only the integration degree is lowered by adding a dummy oxide film pattern, but also the manufacturing time and cost are increased by an additional process.
[0023] Third, due to the component isolation process and BN + The formation process of the diffusion layer is carried out separately, so the number of unit processes before the logic process is increased, and the entire production time and cost are required.

Method used

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  • Method for producing mask read-only storage of flat unit structure
  • Method for producing mask read-only storage of flat unit structure
  • Method for producing mask read-only storage of flat unit structure

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Embodiment Construction

[0038] Figure 4 It is a flow chart for explaining the masked ROM manufacturing method using the flat cell structure of the present invention.

[0039] Such as Figure 4 Shown, the method of the present invention and figure 2 The existing methods shown compare their component isolation and BN + The forming step (S40) of the diffusion layer is performed simultaneously. That is, in the method of the present invention, the STI process to the peripheral circuit area and the BN process to the flat cell array area + The diffusion layer forming steps are not performed separately but simultaneously. In this way, the method of the present invention can reduce the number of unit processes for performing these processes, and can also prevent the phenomenon of under-polishing the oxide film in the flat cell array region and over-polishing the oxide film in the peripheral circuit region during the CMP process for the oxide film.

[0040] However, in the method of the present inventio...

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Abstract

A method for manufacturing a mask ROM of flat cell structure. The method includes the steps of: providing a semiconductor substrate having a flat cell array region and a peripheral circuit region; forming a first and a second mask patterns exposing a substrate portions corresponding to a diffusion layer formation region of the flat cell array region and a device isolation layer of the peripheral circuit region; ion-implanting an impurity in the exposed substrate portions; forming a trench by etching the exposed substrate portion peripheral circuit region; forming a linear oxide layer on the first and the second mask patterns and the surface of the trench, a diffusion layer on the flat cell array region, and a barrier oxide layer on the surface of diffusion layer in accordance with a thermal oxidation process; depositing an oxide layer on the linear oxide layer to fill up the trench; polishing the oxide layer to expose the surface of the first and the second mask patterns; and forming a diffusion layer on the flat cell array region and a trench type isolation layer on the peripheral circuit region by removing the first and the second mask patterns.

Description

technical field [0001] The invention relates to a method for manufacturing a mask read-only memory, and more specifically relates to a method for manufacturing a mask read-only memory with a flat cell structure. Background technique [0002] Mask read-only memory, as a kind of non-volatile element, uses a mask process to record necessary information in the manufacturing process. The mask process for recording information can be completed in the element isolation process or the metal wiring process, and is generally completed in the ion implantation process of the channel area of ​​the memory cell. When the ion implantation to the channel region is completed, a threshold voltage difference is generated between the ion-implanted unit and the non-ion-implanted unit, and the recorded data is judged by the threshold voltage difference. [0003] Most of the read-only memory, especially the mask read-only memory, has a flat cell structure through which a large cell current flows t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/76H01L21/8247H10B20/00H10B69/00
CPCH01L27/11253H01L27/105H01L27/11293H10B20/38H10B20/65
Inventor 韩昌勋
Owner DONGBUANAM SEMICON