Manufacturing method of read only memory

Abstract

A process for preparing ROM includes generating silicon nitride stack on substrate, etching to define the silicon nitride stacks but retaining the oxidized bottom layer, washing, and ion transplantation for generating doped region in substrate between defined silicon nitride stack layers.

Description

technical field [0001] The present invention relates to a manufacturing method of a memory, and in particular to a manufacturing method of a read-only memory (Read Only Memory, ROM). Background technique [0002] In read-only memory, flash memory has the advantages of being programmable, erasable, and retaining data after power-off, and compared with erasable and programmable read-only memory, it has the advantages of in-circuit Due to the advantages of electrical programming and electrical removal, it has become a widely used read-only memory device in personal computers and electronic equipment. [0003] In the known Nitride ROM process, after etching to define the silicon oxide / silicon nitride / silicon oxide stack layer, ion implantation of buried drain (BD) is usually carried out However, the previous etching process will form or leave particles on the bottom or sidewall, and these particles are equivalent to a hard mask during the ion implantation process of the buried ...

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Problems solved by technology

[0003] In the known Nitride ROM process, after etching to define the silicon oxide / silicon nitride / silicon oxide stack layer, ion implantation of buried drain (BD) is usually carried out However, the previous etching process will form or leave particles on the bottom or sidewall, and these particles are equivalent to a hard mask during the ion implantation process of the buried drain. As a result, the distribution of implanted ions is not good, and the integrity of the subsequently formed buried drain oxide is not good, which leads to reliability problems of the device

[0004] Moreover, for ROMs with floating gates, since the source / drain implantation process is usually performed after etching to define the gate structure, the problem of the aforementioned particles being implanted into a hard mask is also a problem. May occur, the result of which will also affect the integrity of the implant profile, thereby creating component reliability issues

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