Polysilicon etching technology capable of preventing device from plasma damage

A technology of plasma and polysilicon, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of process window and process results, and cannot solve the problems of silicon wafer damage, so as to reduce plasma damage and avoid charge accumulation , the effect of optimizing the design

Active Publication Date: 2006-10-25
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, this method still has defects: 1. It has a certain impact on the process window and process results; 2. It cannot solve the damage caused to the silicon wafer during the unloading process of the silicon wafer.

Method used

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  • Polysilicon etching technology capable of preventing device from plasma damage
  • Polysilicon etching technology capable of preventing device from plasma damage
  • Polysilicon etching technology capable of preventing device from plasma damage

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] In the etching process, the silicon wafer is first introduced into the etching reaction chamber, which is adsorbed and fixed by the electrostatic chuck. The temperature of the chamber is controlled at 60°C, and the temperature of the silicon wafer temperature control system is set at 60°C. To improve the temperature uniformity, add The pressure of the He gas back blowing system is set to 8T, and the etching process is performed after the auxiliary process conditions are stable.

[0027] BT step etching: chamber pressure 7mT, upper RF power supply 300W, lower RF power supply 40W, process gas CF 4 The flow rate is 50sccm, and the process time is 5s.

[0028] Main step etching: chamber pressure 10mT, upper RF power 350W, lower RF power 40W, process gas Cl 2 30sccm, HBr 170sccm, HeO 2 (The volume ratio of the two is 7:3, the same below) 15sccm mixed gas, the process time control is detected and controlled by the end point detection system.

[0029] Step etching: chamber...

Embodiment 2

[0032] Using the method of Example 1, the difference is that a stop step is added after the main step, and the specific process is as follows: the swing valve is fully opened, the power of the upper and lower electrodes is 0w, the gas flow rate is 0sccm, and the time is 30s.

[0033] In addition, the specific process of the silicon wafer unloading step is as follows: the chamber pressure is 15mT, the power of the upper electrode is 300W (turn off in ramp mode for 2s), the power of the lower electrode is 0W, the flow rate of the process gas Ar is 200sccm, and the process time is 5s.

[0034] FE-SEM slicing results see image 3 As shown, no microtrench phenomenon was found, indicating that the potential plasma damage was significantly improved.

Embodiment 3

[0036] Using the method of Example 2, the difference is that a stop step is added after the main step, and the specific process is as follows: the swing valve is fully opened, the power of the upper and lower electrodes is 0w, the gas flow rate is 0sccm, and the time is 300s. Wherein the specific process of silicon wafer unloading step is: chamber pressure 10mT, upper electrode power 200W (using ramp mode 5s off), lower electrode power 0W, process gas O 2 The flow rate is 300sccm, and the process time is 5s.

[0037] FE-SEM results see Figure 4 As shown, no microchannel phenomenon was found.

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PUM

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Abstract

This invention provides a polysilicon etching technology for preventing damage to plasmas of devices including a through step, a main etching step, a settle step, an over etching step and a silicon chip downloading step, which reduces the charge accumulation on the surface of silicon chips to reduce damage to plasmas.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for reducing plasma damage in a deep submicron process. Background technique [0002] As semiconductor manufacturing enters the deep sub-micron stage, the feature size of the chip is further reduced, and the integration level of integrated circuits is increasing, which puts forward higher requirements for the semiconductor manufacturing process. For this reason plasma damage should be minimized as it can cause degradation of the electrical properties of the semiconductor device. [0003] The existing etching process steps include a through step, a main etching step, and an over-etching step, and there is no targeted protection against plasma damage. [0004] The mechanism of plasma damage mainly includes the following points: the cumulative effect of charges, the ionization effect of UV rays, and the antenna effect of the design layout. The most important of the...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/3065
Inventor 赵强
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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