Method for manufacturing high-tension film and strain silicon metal oxide semiconductor transistor
A high-tension, strained silicon technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as low tension, reduce the efficiency of ultraviolet technology, affect the drive current of thin-film stress metal oxide semiconductor transistors, etc., and achieve improvement The effect of stress
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[0025] Please refer to FIG. 4 to FIG. 7. FIG. 4 to FIG. 7 are schematic diagrams of the method of fabricating a high tension film on the surface of an NMOS transistor according to the present invention. As shown in FIG. 4, first, a semiconductor substrate 60, such as a silicon wafer or an SOI substrate, is provided, and the semiconductor substrate 60 includes a gate structure 63. The gate structure 63 includes a gate dielectric layer 64, a gate 66 on the gate dielectric layer 64, a cover layer 68 on the top surface of the gate 66, and an oxide-nitride-oxide Offset spacer (ONO offset spacer) 70. Generally speaking, the gate dielectric layer 64 can be made of silicon oxide or silicon nitride compound formed by processes such as thermal oxidation or deposition, and the capping layer 68 can be a silicon nitride layer for protecting the gate 66 Or composed of polycide. In addition, a shallow trench isolation (STI) 62 surrounds the semiconductor substrate 60 outside the active area (AA)...
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