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Developer/rinse formulation to prevent image collapse in resist

a technology of resist and developer, which is applied in the field of developing/rinsing formulation to prevent image collapse in resist, can solve the problems of resist pattern height not being significantly reduced, resist pattern height having a tendency to fall down or collapse, and line width defined by resist is likewise smaller

Inactive Publication Date: 2002-08-22
IBM CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0023] supplying a developer composition to the exposed photoresist film to develop the photoresist pattern, the developer composition containing an anionic surfactant in a sufficient amount to avoid collapse of the pattern;
[0031] supplying means for supplying a developer composition on the exposed photoresist film, the developer composition containing an anionic surfactant in a sufficient amount to avoid collapse of the pattern;
[0036] In another aspect of the present invention, the method and apparatus of the invention is employed to develop a photoresist on electronic component substrates to avoid pattern collapse of the developed substrate.

Problems solved by technology

Unfortunately, as the demands of industry require smaller feature sizes, the line width defined by the resist is likewise smaller.
However, the resist pattern height cannot be significantly reduced because the pattern must have a certain height or thickness in order to remain functional.
The ratio of the height of the resist to the width of the standing line defined by the resist is called the aspect ratio and when lined patterns with a high aspect ratio are formed, a serious problem occurs since the resist pattern has a tendency to fall down or collapse.
In one form of collapse, the tips of the pattern come in contact with each other and the pattern collapse results in a bending, breaking, tearing or peeling of the resist pattern which results in the patterned wafer being unsuitable for further processing.
Image collapse is a serious problem especially as the features on the wafer become smaller, for example, for aspect ratios greater than about 3 and lines less than 150 nm in width.
As a person skilled in the art would appreciate, as the aspect ratio is increased and the line width decreases, the problem becomes more pronounced and in lines having an aspect ratio of 6 and 100 nm line width the collapse problem is very severe.

Method used

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Examples

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Effect test

example

[0065] A semiconductor wafer was coated with a KRS positive resist by spin coating using a puddling procedure. The resist coated wafer was exposed to provide line and space widths of about 100 nm with an aspect ratio of about 6. The exposed wafer was developed by puddling a deionized water solution of 0.263 N TMAH and 1% by weight FC-93 (25% active) on the wafer surface while the wafer was at rest. FC-93 is an ammonium perfluoroalkyl sulfonate surfactant sold by 3M Chemicals. After developing and while the wafer was still wet, the still wet wafer was rinsed with a rinse composition containing deionized water and FC-93 anionic surfactant at a level of 1 weight %. The rinse composition was applied to the wafer at rest and the wafer was rinsed by spinning and then air dried. The results show that the resist pattern did not collapse and was satisfactory from a commercial standpoint. A control sample (no surfactant added to developer and rinse) collapsed at an aspect ratio of 3.5.

[0066] ...

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PUM

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Abstract

An apparatus and method are provided for developing photoresist patterns on electronic component substrates such as semiconductor wafers. The method and apparatus use a specially defined developer composition in sequence with a specially defined rinse composition to develop an exposed photoresist pattern and then to rinse the developed pattern. Both the developer composition and rinse composition contain an anionic surfactant and, when the solutions are used in sequence, have been found to provide a resist pattern which avoids pattern collapse even when small features such as line widths less than 150 nm with aspect ratios of greater than about 3 are formed. It is preferred to use a puddle developing and puddle rinsing process to develop and rinse the exposed wafer. Preferred anionic surfactants are ammonium perfluoroalkyl sulfonate and ammonium perfluoroalkyl carboxylate.

Description

[0001] 1. Field of the Invention[0002] This invention relates generally to the fabrication of electronic components such as integrated circuit semiconductors and, in particular, to a method for avoiding resist pattern collapse in the microlithography steps of integrated circuit fabrication wherein a resist pattern is formed on the wafer surface for subsequent etch removal or material addition steps.[0003] 2. Description of Related Art[0004] The fabrication of electrical circuits on electronic component substrates such as thin film integrated circuits and semiconductor devices such as wafers requires circuit pattern definition using a microlithographic process. Lithographic processes define substrate regions for subsequent etching removal or material addition and the trend for integration is to continue decreasing feature size which includes the line width of the electrical circuit.[0005] Photolithography is the production of a three-dimensional relief image based on the patterned ex...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): B05D1/02B05D7/00G03F7/32G03F7/40H01L21/027
CPCG03F7/32G03F7/322G03F7/40H01L21/027
Inventor MESSICK, SCOTT A.MOREAU, WAYNE M.ROBINSON, CHRISTOPHER F.
Owner IBM CORP
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