Semiconductor device and manufacturing method thereof

Abstract

A method of manufacturing a semiconductor device is provided. First, a well region is formed in a substrate and then a mask layer is formed over the substrate. The mask layer and the substrate are patterned to form a first opening in the substrate. Thereafter, a threshold voltage adjustment process is performed. A gate dielectric layer, a first conductive layer and a second conductive layer are sequentially formed inside the first opening. The second conductive layer completely fills the first opening. A portion of the first conductive layer and the second conductive layer are removed so that the upper surface of the first conductive layer and the second conductive layer is slightly below the upper surface of the substrate and hence forms a second opening. A cap layer is formed in second opening and then the mask layer is removed. A source / drain region is formed in the substrate on each side of the first conductive layer. An inter-layer dielectric layer is formed over the substrate. Finally, using the cap layer as a self-aligned mask, a contact opening is formed in the inter-layer dielectric layer.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application is a divisional of a prior application Ser. No. 10 / 604,509, filed Jul. 28, 2003, which claims the priority benefit of Taiwan application serial no. 92104352, filed Mar. 3, 2003.BACKGROUND OF THE INVENTION [0002] 1. Field of Invention [0003] The present invention relates to a method of manufacturing an integrated circuit. More particularly, the present invention relates to a semiconductor device and manufacturing method thereof. [0004] 2. Description of Related Art [0005] In deep sub-micron integrated circuit manufacturing, the level of device integration has increased considerably. As the level of integration continues to increase, many features including contact area, junction depth and line width must be reduced correspondingly. To boost the performance capacity of such miniature devices, resistance must be reduced and resistance-capacitance (RC) delay in transmitted signals through a conductive wire must be lowered as...

AI Technical Summary

Benefits of technology

[0012] Accordingly, an object of the present invention is to provide a semiconductor device and manufacturing method thereof capable of forming a tungsten-rich tungsten silicide layer within the semiconductor device without yielding any lateral outgrowth on the sidewalls of an internal structure due to the presence of tungsten-rich metal silicide compound. Thus, it is possible to increase the level of integration and overall performance of the semiconductor device.

[0013] A object of this invention is to provide a semiconductor device and manufacturing method thereof having a lower overall thermal budget.

[0014] A object of this invention is to provide a semiconductor device and manufacturing method thereof capable of producing an internal structure with a lower aspect ratio so that the process window for etching out contacts is increased.

Problems solved by technology

As line width of semiconductor devices continues to shrink, these lateral extrusions may be so close together that short-circuit between the gate and the conductive section of a subsequently formed contact seems inevitable.

When this happens, performance of the device will be immensely affected.

Yet, increasing the thickness of the tungsten silicide layer will increase the aspect ratio of the gate leading to greater difficulties in performing a subsequent gate etching and self-aligned contact (SAC) etching process.

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