Method of fabricating CMOS devices having a single work function gate electrode by band gap engineering and article made thereby

Abstract

A method utilizing a common gate electrode material with a single work function for both the pMOS and nMOS transistors where the magnitude of the transistor threshold voltages is modified by semiconductor band engineering and article made thereby.

Description

RELATED APPLICATIONS [0001] This application relates to the application entitled “CMOS devices with a Single Work Function Gate Electrode and Method of Fabrication,” filed on Sep. 28, 2005.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to the field of semiconductor integrated circuit manufacturing, and more particularly to CMOS (complementary metal oxide semiconductor) devices having gate electrodes with a single work function. [0004] 2. Discussion of Related Art [0005] During the past two decades, the physical dimensions of MOSFETs have been aggressively scaled for low-power, high-performance CMOS applications. In order to continue scaling future generations of CMOS, the use of metal gate electrode technology is important. For example, further gate insulator scaling will require the use of dielectric materials with a higher dielectric constant than silicon dioxide. Devices utilizing such gate insulator materials demonstrate vastly ...

AI Technical Summary

Benefits of technology

[0016] Embodiments of the present invention include complementary (pMOS and nMOS) transistors having semiconductor channel regions which have been band gap engineered to achieve a low threshold voltage. In particular embodiments, the complementary devices utilize the same material having a single work function as the gate electrode. Engineering the band gap of the semiconductor transistor channels rather than engineering the work function of the transistor gate metal for the individual pMOS and nMOS devices avoids the manufacturing difficulties associated with depositing and interconnecting two separate gate metals in a dual-metal gate process. A single metal gate stack, used for both pMOS and nMOS transistors, simplifies fabrication while engineering the band gap of the semiconductor transistor channels enables independent tuning of the pMOS and nMOS threshold voltages. In embodiments of the present invention, the threshold voltage of a device can be targeted through the use of semiconductor materials that have an appropriate valance band (nMOS) or conduction band (pMOS) offset relative to the substrate. Therefore, embodiments of the present invention can utilize a single mid-band gap metal for both the pMOS and nMOS transistors in a CMOS device while still achieving a low threshold voltage for both the pMOS and nMOS transistors.

Problems solved by technology

For such devices, a “mid-gap” work function gate electrode that is located in the middle of the p and n channel work function range is inadequate.

A mid-gap gate electrode typically results in a transistor having either a threshold voltage that is too high for high-performance applications, or compromised SCEs when the effective channel doping is reduced to lower the threshold voltage.

Therefore, a single mid-gap gate material is also incapable of achieving low threshold voltages for both pMOS (a MOSFET with a p-channel) and nMOS (a MOSFET with an n-channel) multi-gate transistors.

Attempts at changing the work function of metal gate materials to achieve similar threshold voltages is difficult as the metal work function must either be varied with an alloy mixture or two different metals utilized for n and p-channel devices.

While fabricating transistors having gate electrodes made of two different materials is prohibitively expensive, simpler approaches to dual-metal gate integration like work-function engineering of the metal film suffer from problems such as poor reliability and insufficient work-function shift.

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