Double-masking technique for increasing fabrication yield in superconducting electronics

Abstract

An improved microfabrication technique for Josephson junctions in superconducting integrated circuits, based on the use of a double-layer lithographic mask for partial anodization of the side-walls and base electrode of the junctions. The top layer of the mask is a resist material, and the bottom layer is a dielectric material chosen so to maximize adhesion between the resist and the underlying superconducting layer, be etch-compatible with the underlying superconducting layer, and be insoluble in the resist and anodization processing chemistries. The superconductor is preferably niobium, under a silicon dioxide layer, with a conventional photoresist or electron-beam resist as the top layer. This combination results in a substantial increase in the fabrication yield of high-density superconducting integrated circuits, increase in junction uniformity and reduction in defect density. A dry etch more compatible with microlithography may be employed.

Description

CROSS REFERENCE TO RELATED APPLICATIONS[0001]This application is a Continuation / Division of Ser. No. 11 / 616,382, filed Dec. 27, 2006, which is expressly incorporated herein by reference. This application is related to and claims priority to Provisional Application 60 / 826,262 filed Sep. 20, 2006 by inventor Sergey K. Tolpygo entitled A Double-Masking Technique for Increasing Fabrication Yield and Josephson Junction Quality in Superconducting Electronics, the contents of which are incorporated herein by reference in its entirety.STATEMENT OF GOVERNMENT RIGHTS[0002]This invention was developed in part under contract number N0014-03-C-0370 from the Office of Naval Research.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The invention is directed to fabrication of electronic devices and more particularly to the fabrication of superconducting electronic devices such as Josephson junctions.[0005]2. Description of the Prior Art[0006]Superconducting integrated circuits (ICs) ...

AI Technical Summary

Benefits of technology

[0013]The invention recognizes that failure of interlayer adhesion between photoresist and Nb is a major cause of defects in the fabrication technology of the prior art. By substantially improving such adhesion, the present invention offers the possibility of improved reliability and IC yield.

[0014]In the prior art, the very same photoresist mask had to survive two subsequent fabrication steps—etching and self-aligned junction anodization (passivation) without loss of adhesion. The new technique is more robust in this respect since the bottom layer of the double-layer would prevent defect formation during anodization even if the top (resist) layer fails. This technique has been incorporated into a complete IC process, and indeed has resulted in substantially improved IC yield, especially for the smallest junctions (below 1.5 microns size) where the problems had previously been the most severe.

[0015]The present invention does increase the number of steps in the full process, since the SiO2 layer in the mask must first be deposited, and subsequently etched away. (However, this etch-away step can be done simultaneously with the counter-electrode etching.) Nevertheless, this extra effort is easily worthwhile, since it enables the manufacturing (with reasonable yield) of higher-density superconducting ICs with greatly enhanced device speed and performance.

[0016]A second process improvement of the present invention replaces a wet-etch process for AlOx removal in the prior art with an optimized dry-etch (or argon ion mill) process, in order to enhance junction uniformity and yield for small junctions.

Problems solved by technology

During this step, penetration of the anodization solution (the electrolyte) under the resist would cause major fabrication defects.

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