Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Unpolished Semiconductor Wafer and Method For Producing An Unpolished Semiconductor Wafer

a technology of unpolished semiconductor and semiconductor wafer, which is applied in the direction of polycrystalline material growth, crystal growth process, after-treatment details, etc., can solve the problems of deteriorating the planarity affecting the production efficiency of the semiconductor wafer, and affecting the quality of the unpolished semiconductor wafer. , to achieve the effect of facilitating the production of components with smaller linewidths and improving the surface quality of the unpolished semiconductor wafer

Inactive Publication Date: 2010-09-23
SILTRONIC AG
View PDF19 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0032]It is therefore an object of the invention to improve the surface quality of unpolished semiconductor wafers and to permit smaller linewidths of components produced thereon. These and other objects are achieved by a method for producing an unpolished semiconductor wafer which comprises the following steps: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, (g) finally cleaning the semiconductor wafer. The wafers thus produced are not processed further, but are packaged for shipping.

Problems solved by technology

For the production of semiconductor wafers for applications in power electronics or for the fabrication of discrete components, however, these methods are too elaborate and uneconomical.
A disadvantage of this method is that lapping leads to damage deep into the interior of the crystal lattice, which usually necessitates increased material removal during the subsequent etching in order to remove this damage.
A high etch removal leads to a deterioration of the planarity of the semiconductor wafer.
This method is also disadvantageous, since further deterioration of the planarity of the semiconductor wafer is to be expected from two etching steps.
An inferior surface roughness of the semiconductor wafers produced, namely less than 100 nm, is reported in all known methods in which a lapping step is provided.
Another disadvantage of the foregoing method is that again, a high etching removal is provided, which entails a deterioration of the planarity or the microstructure of the surface of the wafer.
Such a microstructure leads to a limitation of the possible linewidth in photolithographic processes during the production of components.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Examples

Experimental program
Comparison scheme
Effect test

example

[0063]The following process parameters were selected for the production of semiconductor wafers:

[0064]A single crystal was wire sawn to provide wafers of a thickness of 425 μm, followed by grinding abrasion 50 μm per side, of which 30 μm is achieved by coarse grinding and 20 μm by fine grinding. Etching treatment with a material removal of 12.5 μm per side, then followed, providing semiconductor wafers with the following parameters: GBIR 1.5 μm±1 μm; Thickness 300 μm±10 μm; Reflectivity: 99%±0.7%; Short-range surface roughness, measured by means of AFM (atomic force microscope), length scales up to 50 μm: 3 nm±1 nm; Long-range surface roughness (on length scales up to 2 mm): 30 nm±3 nm (orange peel); and Edge shape: edge circle radius of 150 μm and a tangent angle of 32°.

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 μm, an overall planarity value GBIR of 5 μm or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 μm, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]The invention relates to an unpolished semiconductor wafer and to a method for producing an unpolished semiconductor wafer.[0003]2. Background Art[0004]According to the prior art, semiconductor wafers are produced in a multiplicity of successive process steps, which can generally be subdivided as follows:[0005]a) production of a single crystal of semiconductor material (crystal pulling);[0006]b) separation of the semiconductor single crystal into individual wafers (wafering, sawing);[0007]c) mechanical processing of the semiconductor wafers;[0008]d) chemical processing of the semiconductor wafers;[0009]e) chemical-mechanical processing of the semiconductor wafers.Added to this, there are a multiplicity of substeps such as cleaning, measuring and packaging.[0010]A single crystal is conventionally produced by pulling a semiconductor single crystal from a melt (CZ or Czochralski method) or by recrystallizing a rod of polyc...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(United States)
IPC IPC(8): H01L29/04
CPCC30B33/00C30B29/06H01L21/20H01L21/304H01L21/30
Inventor HENSEL, WOLFGANGLEHNER, RUDOLFSCHWENK, HELMUT
Owner SILTRONIC AG
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products