Methods and apparatus for controlling photoresist line width roughness with enhanced electron spin control

Abstract

The present invention provides methods and an apparatus for controlling and modifying line width roughness (LWR) of a photoresist layer with enhanced electron spinning control. In one embodiment, an apparatus for controlling a line width roughness of a photoresist layer disposed on a substrate includes a processing chamber having a chamber body having a top wall, side wall and a bottom wall defining an interior processing region, a support pedestal disposed in the interior processing region of the processing chamber, and a plasma generator source disposed in the processing chamber operable to provide predominantly an electron beam source to the interior processing region.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application claims benefit of U.S. Provisional Patent Application No. 61 / 497,370, filed Jun. 15, 2011, which is incorporated by reference in its entirety.BACKGROUND[0002]1. Field of the Invention[0003]The present invention generally relates to methods and apparatus for controlling photoresist line width roughness and, more specifically, to methods and apparatus for controlling photoresist line width roughness with enhanced electron spin control in semiconductor processing technologies.[0004]2. Description of the Related Art[0005]Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors and resistors) on a single chip. The evolution of chip designs continually requires faster circuitry and greater circuit density. The demands for greater circuit density necessitate a reduction in the dimensions of the integrated circuit components.[0006]As the dimensions of the integrat...

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Benefits of technology

[0010]In another embodiment, a method for controlling line width roughness of a photoresist includes providing a substrate having a patterned photoresist layer in a processing chamber, supplying a gas mixture into the processing chamber, generating a plasma in the gas mixture having electrons moving in a circular mode from the gas mixture, generating a magnetic field to enhance the electrons in the plasma moving in the circular mode to a substrate surface, and trimming an edge profile of the patterned photoresist layer disposed on the substrate surface with the enhanced electrons.

[0011]In another embodiment, a method for controlling line width roughness of a photoresist layer disposed on a substrate includes providing a substrate having a patterned photoresist layer disposed thereon into a processing chamber, supplying a gas mixture into the processing chamber, generating a plasma in the gas mixture, extracting electrons out of the plasma, generating a magnetic field to enhance the electrons moving in a circular mode to a substrate surface, and trimming an edge profile of the patterned photoresist layer disposed on the substrate surface with the enhanced plasma.

[0012]In yet another embodiment, a method for controlling line width roughness of a photoresist layer disposed on a substrate includes supplying a gas mixture into a processing chamber having a substrate disposed therein, wherein the substrate has a patterned photoresist layer disposed thereon, generating a plasma in the processing chamber from the gas mixture supplied in the processing chamber, applying a voltage to a shield plate disposed in the processing chamber to filter ions from the plasma and leaving mild reactive species, directing the mild reactive species through a control plate, applying a DC or AC power to a group of one or more electromagnetic coils disposed around an outer circumference of the processing chamber to generate a magnetic field, enhancing movement of the mild reactive species in circular mode by passing the mild reactive species through the magnetic field, and trimming an edge profile of the patterned photoresist layer using the mild reactive species.

Problems solved by technology

Integrated circuits have evolved into complex devices that can include millions of components (e.g., transistors, capacitors and resistors) on a single chip.

Accordingly, lithography processes have become more and more challenging to transfer even smaller features onto a substrate precisely and accurately without damage.

However, at such small dimensions, the roughness of the edges of a photoresist layer has become harder and harder to control.

However, inaccurate control or low resolution of the lithography exposure process may cause in poor critical dimension control in the photoresist layer 104, thereby resulting in unacceptable LWR 108.

Large LWR 108 of the photoresist layer 104 may result in inaccurate feature transfer to the target material 102, thus, eventually leading to device failure and yield loss.

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