Semiconductor device with air gap structure and method for preparing the same
a technology of semiconductor devices and air gaps, which is applied in the direction of semiconductor devices, semiconductor/solid-state device details, electrical apparatus, etc., can solve the problems of reducing overall device performance, increasing parasitic capacitance, and undesirably slowing of dram memory cells, so as to improve overall device performance, reduce parasitic capacitance between bit lines and capacitor contacts, and improve the effect of overall device performan
Active Publication Date: 2021-02-18
NAN YA TECH
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Benefits of technology
The patent describes a semiconductor device with a bit line, capacitor contact, and dielectric structure separated by an air gap structure. This reduces the capacitance between the bit line and capacitor contact, improving the device performance and increasing the speeds. The first dielectric layer is designed to have high etching selectivity against the dielectric structure during removal.
Problems solved by technology
However, as DRAM memory cell dimension requirements are dictating decreased sizes, capacitive coupling is becoming an increasingly important issue which results in increased parasitic capacitance.
Accordingly, speeds of DRAM memory cells are undesirably slowed down and overall device performance is being negatively impacted.
Method used
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[0044]The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and / or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.
[0045]F...
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Abstract
A semiconductor device includes a first bit line disposed over a semiconductor substrate. The semiconductor device also includes a capacitor contact and a dielectric structure disposed over the semiconductor substrate and adjacent to the first bit line. The capacitor contact, the dielectric structure and the first bit line are separated from one another by an air gap structure.
Description
TECHNICAL FIELD[0001]The present disclosure relates to a semiconductor device and a method for preparing the same, and more particularly, to a semiconductor device with an air gap structure between conductive structures and a method for preparing the same.DISCUSSION OF THE BACKGROUND[0002]Due to structural simplicity, dynamic random access memories (DRAMs) can provide more memory cells per unit chip area than other types of memories, such as static random access memories (SRAMs). A DRAM is constituted by a plurality of DRAM cells, each of which includes a capacitor for storing information and a transistor coupled to the capacitor for regulating when the capacitor is charged or discharged. During a read operation, a word line (WL) is asserted, turning on the transistor. The enabled transistor allows the voltage across the capacitor to be read by a sense amplifier through a bit line (BL). During a write operation, the data to be written is provided on the BL while the WL is asserted.[...
Claims
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IPC IPC(8): H01L27/108H01L29/06H01L23/522H01L23/528H10B12/00
CPCH01L27/10885H01L27/10888H01L23/5283H01L23/5226H01L29/0649H01L21/7682H10B12/315H10B12/02H10B12/485H10B12/0335H10B12/482H01L21/76885H01L23/485
Inventor SU, KUO-HUI
Owner NAN YA TECH