On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively

a technology of redundant drive and write and read operation, applied in the field of digital data storage, can solve the problems of sharp drop in reliability, limited system performance, and inability to keep up with the speed of disk drive technology, so as to reduce the cost and complexity of disk array controller apparatus, improve disk array performance, and improve disk array performance

Inactive Publication Date: 2006-12-05
NVIDIA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0022]In view of the foregoing background, the need remains to improve disk array performance. It is an object of the present invention to provide improved disk array performance while reducing the cost and complexity of disk array controller apparatus. Another object of the...

Problems solved by technology

Disk drive technology has not kept up, however.
Unfortunately, increasing the RPM much above 5000 causes a sharp drop off in reliability.
System performance thus is limited because the faster microprocessor is hampered by the disk drive data transfer “bottleneck”.
Such a local buffer does not provide any advantage for a single random access (other than making the disk and host transfer rates independent).
Despite all of the prior art in disk drives, controllers, and system level caches, a process cannot average a higher disk transfer rate than the data rate at the head.
Unfortunately, this approach is not directly applicable to disk drives.
Disk arrays require substantial supporting hardware, however.
While four drives have the potential of achieving four times the single drive transfer rate, this would rarely be achieved if the disk capacity were simply mapped consecutively over the four drives.
A single drive failure rate which previously might have been adequate becomes unacceptable in an array.
Redundancy in known RAID systems, however, exacts penalties in performance and complexity.
IDE drives dominate the low end of the market in terms of cost, capacity, and perfor...

Method used

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  • On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively
  • On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively
  • On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively

Examples

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Embodiment Construction

[0049]FIG. 2 is a hardware block diagram illustrating one embodiment of the invention as applied to an array of IDE drives (0-3) so as to provide synchronous data transfer. The host bus 102, host interface 104 and RAM buffer 106 (also referred to herein as the “buffer memory” or “cache”) were described with reference to FIG. 1 previously. In the system of FIG. 2, each of the disk drives, IDE drive 0 through IDE drive 3, is coupled to the RAM buffer 106 through a respective bus transceiver circuit having the same width as the drive interface (for example 16 bits or 2 bytes). For example, drive 0 is coupled to bus transceiver (“BUS XCVR”) 204 via path 206 and bus transceiver 204 in turn is coupled via path 208 to the RAM buffer 106.

[0050]Support of the drive interfaces requires two types of information transfers, control and data. The data paths are shown in FIG. 2 as described. The control information shares 206—the drive data port, but does not come from the RAM. Another path, not s...

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Abstract

A disk drive array controller and method carries out disk drive data transfers not only concurrently but also synchronously with respect to all of the drives in the array. For synchronous operation, only a single-channel DMA is required to manage the buffer memory. A single, common strobe is coupled to all of the drives for synchronous read and write operations, thereby reducing controller complexity and pin count. A ring-structure drive data bus together with double buffering techniques allows use of a single, common shift clock instead of a series of staggered strobes as required in prior art for multiplexing/demultiplexing buffer memory data, again providing for reduced controller complexity and pin count in a preferred integrated circuit embodiment of the new disk array controller. Methods and circuitry also are disclosed for generating and storing redundant data (e.g. “check” or parity data) “on the fly” during a write operation to a RAID array. Techniques also are disclosed for reconstructing and inserting missing data into a read data stream “on the fly” so that a disk drive failure is transparent to the host.

Description

RELATED APPLICATION[0001]This is a division of application Ser. No. 08 / 642,453, filed May 3, 1996, now U.S. Pat. No. 6,018,778.TECHNICAL FIELD[0002]The present invention lies in the field of digital data storage and more specifically is concerned with disk drive controllers for multiple disk drives, generally known as disk drive arrays.BACKGROUND OF THE INVENTIONHard Disk Drives[0003]Hard disk drives are found today in virtually every computer (except perhaps low-end computers attached to a network server, in which case the network server includes one or more drives). A hard disk drive typically comprises one or more rotating disks or “platters” carrying a magnetic media on which digital data can be stored (or “written”) and later read back when needed. Rotating magnetic (or optical) media disks are known for high capacity, low cost storage of digital data. Each platter typically contains a multiplicity of concentric data track locations, each capable of storing useful information. ...

Claims

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Application Information

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IPC IPC(8): G06F13/14G06F3/06G06F11/10
CPCG06F3/061G06F3/0626G06F3/0656G06F3/0689G06F11/1076G06F2211/1054
Inventor STOLOWITZ, MICHAEL C.
Owner NVIDIA CORP
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