48results about How to "Reduced load variance" patented technology

The invention relates to the field of cluster deployment, and provides a cluster resource scheduling method, a node, equipment and a storage medium. The method comprises the steps of collecting stateinformation of each slave node in a cluster, analyzing the state information of each slave node, calculating the longest response duration of each slave node according to the state information of eachnode, determining the current load state of each slave node according to the longest response duration, and dividing a starting level for each slave node according to the load state of each slave node; and according to the load state of each slave node and the starting level of each slave node, selecting the slave node with a load lower than a preset load rate as a working node, and sending an operation instruction to the working node to enable the working node to execute the operation instruction. By adopting the scheme, the load difference of the cluster nodes can be reduced, the load balance is realized, the execution efficiency of executing services by the nodes is effectively improved, and the performance of the cluster is improved.

The present invention discloses a display panel and a display device. The device panel comprises a plurality of pixel units arranged at a display area in an array assignment, and a gate drive circuit at least arranged at the display area; and the gate drive circuit comprises a plurality of cascade shifting register units, each shifting register unit is respectively connected with one row of the pixel units, and each shifting register unit at least comprises three shifting register unit subcircuit in the display area. Because each shifting register unit provides gate drive signals for the correspondingly connected one row of the pixel units, the at least three shifting register unit subcircuits included by each shifting register unit are arranged in the display area to realize the segment scanning of each shifting register unit subcircuit for the same row of the pixel units so as to reduce the load difference of each shifting register unit for each pixel unit in the correspondingly connected one row of the pixel units and prolong the effective charging time of each pixel unit.

The invention discloses a display panel and a display device. The display panel comprises a substrate, a plurality of first signal lines, a plurality of second signal lines, a plurality of first connecting line units and a plurality of second connecting line units,, wherein the substrate comprises at least one light transmission region, a main display region and a first transition display region;each first signal line comprises at least two first signal line segments which are separated by the light transmission region in the first direction; each second signal line comprises at least two second signal line segments which are separated by the light transmission region and the first transition display region in the first direction, the signal type of a signal provided by the second signalline is the same as the signal type of a signal provided by the first signal line; each first connecting line unit electrically connects the at least two first signal line segments corresponding to one first signal line; and each second connecting line unit electrically connects the at least two second signal line segments corresponding to one second signal line. According to the display panel provided by the embodiment of the invention, the display area ratio of the display panel can be improved.

A display panel is provided having a built-in touchscreen and a touch display device including the same. The display panel has a touch electrode structure allowing parasitic capacitance to be dispersed to a greater number of gate lines, which form parasitic capacitance together with touch electrodes, without concentrically relying on specific gate lines. Differences in load between gate lines are reduced to improve image quality.

The embodiment of the invention discloses an array substrate, a display panel and a display device. The array substrate comprises a substrate, a first metal layer, an interlayer dielectric layer, a second metal layer, an organic planarization layer and a third metal layer. In the first metal layer, a plurality of scanning lines is formed in a display area, and a data connection lead is not formedin a fan-out area. In the second metal layer, a plurality of data lines is formed in the display area, and multiple data connection leads are formed in the fan-out area. In the third metal layer, multiple data connection leads are formed in the fan-out area, wherein one end of each of the data connection leads close to the display area is electrically connected with a data line in a one-to-one correspondence mode, every two adjacent data connecting leads are located on different layers, and vertical projections of the data connecting leads on an underlayer substrate at least partially coincide. According to the technical scheme provided by the embodiment of the invention, a load difference between two adjacent data connection leads can be reduced, and meanwhile, the height of the fan-out area can be reduced.

The invention discloses a display panel and a display device and relates to the technical field of display. In the embodiment of the invention, by arranging first connecting lines A and first connecting lines B, namely when each first grid line is electrically connected with at least one first connecting line A transmitting grid electrode scanning signals and each second grid line is electricallyconnected with at least two first connecting line B transmitting same grid electrode scanning signals, the width of the first connecting lines A is set to be smaller than that of the first connectinglines B. Therefore, decrease of load difference of first grid lines and second grid lines can be facilitated, thus the delay difference of the first grid lines and the second grid lines is decreased,display of the display panel is more uniform, and accordingly the display effect of the display panel is improved.

The invention discloses an array substrate and a display device. According to the invention, a flip pixel architecture for wiring in a DD + G mode is adopted, and a GOA circuit is arranged on a sourcedriving side; since the two data lines are adjacent and enter the AA area in parallel, the gate fan-out lead and the two data lines enter the AA area in a parallel but non-adjacent manner, and signalcoupling between the gate fan-out lead and the data lines is prevented. By using the widths of two pixel units to carry out the first-stage GOA circuit layout, the realization of a narrow frame is facilitated.

The embodiment of the invention relates to a display screen and display equipment. The display screen comprises a first area and a second area connected to the first area, the display screen comprises a light-emitting assembly arranged in the first area, and ambient light can penetrate through the first area to be incident to a photosensitive element; a driving assembly, arranged in the second area and used for driving the light-emitting assembly to emit light; a plurality of wiring layers, stacked in a first direction, the first direction being parallel to the thickness direction of the display screen, a plurality of signal wires being formed in the wiring layers, and the plurality of signal wires being used for connecting the light-emitting assembly and the driving assembly; the coupling capacitance of each signal line is arranged in the same preset range, and the coupling capacitance comprises mutual capacitance and self-capacitance. In the embodiment of the invention, the coupling capacitance of each signal line is set to be in the same preset range, so that the load difference between different driving units can be reduced, and the display uniformity of the display screen is improved.

The invention discloses a touch display panel, a driving method of the touch display panel and a touch display device. The touch display panel comprises a display area and a non-display area. The display area comprises a plurality of sub-pixels and a plurality of touch electrodes; the non-display area comprises a driving chip and a display multi-path selection circuit; the working stage of the touch display panel comprises a plurality of working refreshing stages, and the working refreshing stages comprise a first refreshing stage and a display intermittent stage; the first refreshing stage comprises a display refreshing sub-stage and a first touch refreshing sub-stage; the driving chip is used for transmitting display signals to the sub-pixels in the display refreshing sub-stage, transmitting a touch signal to the touch electrode in the first touch refreshing sub-stage, and transmitting an enabling clock signal to the display multi-path selection circuit in the display intermittent stage, and controlling the display multi-path selection circuit to be switched on. The display multi-path selection circuit is controlled to be switched on to release electrostatic charges in the display intermittent stage, the touch load difference in the first refreshing stage and the display intermittent stage is reduced, and the touch detection effect is improved.

The invention discloses an array substrate, a display panel and electronic equipment. The array substrate comprises a substrate body, scanning lines and data lines, the scanning lines and the data lines are perpendicularly arranged in a staggered mode, the substrate body is provided with a camera hole area, the scanning line partially surrounding the camera hole area is set as a first scanning line, and the scanning line not surrounding the camera hole area is set as a second scanning line. The data line surrounding the camera hole area is set as a first data line, and the scanning line not surrounding the camera hole area is set as a second data line; and in the direction from the edge of the camera hole area to the center of the camera hole area, the width of the part, surrounding the camera hole area, of the first data line and/or the first scanning line is gradually increased. According to the array substrate in the technical scheme, by widening the sections of the scanning lines and the data lines in the camera hole area, the increased wiring length and the reduced pixel number due to the fact that the camera hole area occupies are compensated, then it is guaranteed that the resistance loads and the capacitance loads of all the positions are the same, and the problem of uneven display is solved.