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Semiconductor structure and forming method thereof

A semiconductor and integrated circuit technology, applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, etc., can solve problems such as increased impedance, increased equivalent resistance, and reduced bump plating yield

Active Publication Date: 2009-08-26
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the equivalent resistance of the UBM layer or other conductive layers with increased thickness will increase, and since the UBM layer’s main function is to serve as an adhesive layer between the bump and the pad, its impedance itself is relatively high, so the UBM layer If the metal layer under the block has a large thickness, the impedance between the bump and the pad will increase seriously, which is not conducive to the electrical connection between the chip and the circuit board
All of the above situations will affect the electroplating effect, reduce the yield rate of bump electroplating, and require post-processing reformation or scrap the chip

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0012] Figure 1(a) to Figure 1(d) A preferred embodiment of the present invention is shown to present a manufacturing process of a semiconductor structure 10 having a conductive structure.

[0013] As shown in Figure 1(a), the semiconductor structure 10 includes a base material 11 and a passivation layer 12 arranged above the base material 11. Because there is an integrated circuit layout on the base material 11, the passivation layer 12 The surface is not flat; as shown in the figure, the passivation layer 12 has an uneven first upper surface 101 . If a conductive UBM layer is directly formed on the first upper surface 101, the UBM layer may form breakpoints at the turning points of the first upper surface 101, resulting in uneven impedance and poor conductivity. . Since the substrate 11 with the integrated circuit layout is manufactured, the passivation layer 12 has also been formed together, and the passivation layer 12 is widely and isotropically formed on the substrate ...

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Abstract

The invention relates to a semiconductor structure and a method for forming the semiconductor structure. The semiconductor structure comprises a base material and an integrated circuit arranged on the base material to form an even surface through formation of a barrier layer so that an underlying metal is formed on the barrier layer. In this way, a conducting layer is prevented from producing breakpoints affecting the distribution of the impedance of the conducting layer. Accordingly, the conducting layer has stable conduction characteristics.

Description

technical field [0001] The present invention relates to a conductive structure; in particular, to a conductive structure for a semiconductor integrated circuit and its forming method. Background technique [0002] Bump plating has developed many technologies in the fields of microelectronics and microsystems, such as the connection between flat panel displays (FPD) and driver ICs, and the conduction on gallium arsenide chips. The bump electroplating technology is used in different stages in the line and air bridge technology, as well as in the fabrication of the X-ray mask in the LIGA technology. [0003] Taking the connection between the circuit board and the IC chip as an example, the IC chip can be connected to the circuit board in various ways, and its packaging method is mainly to use bump (especially gold bump) electroplating technology to place the pads in the IC chip Electrically connected with the circuit board. This technology can not only greatly reduce the size...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/485H01L21/60
CPCH01L2924/0002
Inventor 傅文勇
Owner CHIPMOS TECH INC