A digital phase lock loop device for smooth switching of clock phase and its method

Abstract

The invention discloses a digital locked ring device to realize clock phase smooth conversion, which is characterized by the following: the reference source processes the selected reference clock according to master spare pattern; the time digital converses the reference clock and phase difference from local clock of frequency divider into the corresponding coded digital code to realize phase demodulation and phase difference digitalization to be transmitted to CPU filter and locked processing unit the proceed linear phase disposal, low-pass digital filter disposal, locked disposal, which outputs the digital phased error signal to the digifax converser as corresponding analog voltage-controlled value, in order to control the corresponding vibrating frequency output by voltage-controlled crystal oscillator; the frequency is processed by frequency divider to transmit the local clock with the same frequency as reference frequency to time digital converter. The invention realizes high-precision error control of main spare systems, which is convenient to integrate chip with high reliability and integration level.

Description

technical field [0001] The invention relates to the technical field of communication, in particular to a digital phase-locked loop device and method for realizing smooth switching of clock phases. Background technique [0002] In the design of most digital communication systems, the importance of the clock is self-evident. Not only does it require a high level of device clock, it needs to be implemented using a digital phase-locked loop (DPLL, Digital Phase Locked Loop). "1+1" hot backup is adopted, that is, one master and one backup. The backup phase-locked loop tracks the master clock to ensure the same frequency of the master and slave clocks. Once the master clock unit fails, the backup clock is immediately switched to the master state, which is digital The system provides a timing clock source. However, during the switching process of the clock source from standby to active, if there is a clock phase step, the communication system may have serious alarms such as bit er...

AI Technical Summary

Problems solved by technology

[0007] The technical problem to be solved by the present invention is to provide a digital phase-locked loop device and method for smooth switching of the clock phase, which uses a time-to-digital converter to achieve the purpose of frequency and phase detection, and at the same time improves the control accuracy of the phase difference to achieve Overcome the defects that are difficult to achieve in the existing technology, and solve the problem of large phase steps when the main and standby clocks are switched

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